Internal loop I2S TDM ports

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Orin
1

Hi,
I have an external codec that is taking in input a BCLK and LRKC signal and giving in output two16-channels 48kHz 32-bit TDM signals on two different I2S ports.

On the ORIN I’m using the two I2S ports on the 40-pin header and on the M2 connector (I2S2 and I2S4) to gather the two streams from the codec.

Currently one port is configured as bit-master / frame-master and the other one as bit-slave / frame-slave because the BCLK and LRKC signals are being routed by the external codec from one port to the other one.

What I’d like to do is: instead of letting the BCLK and LRKC signals to be routed externally by the codec, I want the clock to be routed internally, from I2S2 to I2S4.

Is that possible at all on the ORIN? I’m currently using r35.4.1 .

4

Hi,
Could you please let me know I2S2, I2S4 and codec clock mode, in terms of what will be master and slave.

5

This is the configuration for I2S2 and I2S4 I’m using:

#!/bin/bash

amixer -c APE cset name="I2S2 Mux" ADMAIF2
amixer -c APE cset name="ADMAIF2 Mux" I2S2
amixer -c APE cset name="I2S2 codec master mode" cbs-cfs
amixer -c APE cset name="I2S2 codec frame mode" dsp-a
amixer -c APE cset name="I2S2 Capture Audio Bit Format" 32
amixer -c APE cset name="I2S2 Playback Audio Bit Format" 32
amixer -c APE cset name="I2S2 Client Bit Format" 32
amixer -c APE cset name="I2S2 Client Channels" 16
amixer -c APE cset name="I2S2 Capture Audio Channels" 16
amixer -c APE cset name="I2S2 Playback Audio Channels" 16
amixer -c APE cset name="I2S2 FSYNC Width" 0
amixer -c APE cset name="I2S2 Sample Rate" 48000
amixer -c APE cset name="I2S2 Loopback" off
amixer -c APE cset name="I2S2 Capture Data Offset" 2

amixer -c APE cset name="I2S4 Mux" ADMAIF3
amixer -c APE cset name="ADMAIF3 Mux" I2S4
amixer -c APE cset name="I2S4 codec master mode" cbm-cfm
amixer -c APE cset name="I2S4 codec frame mode" dsp-a
amixer -c APE cset name="I2S4 Capture Audio Bit Format" 32
amixer -c APE cset name="I2S4 Playback Audio Bit Format" 32
amixer -c APE cset name="I2S4 Client Bit Format" 32
amixer -c APE cset name="I2S4 Client Channels" 16
amixer -c APE cset name="I2S4 Capture Audio Channels" 16
amixer -c APE cset name="I2S4 Playback Audio Channels" 16
amixer -c APE cset name="I2S4 Sample Rate" 48000
amixer -c APE cset name="I2S4 Loopback" off
6

Hi,
Codec can be either master / slave and as per that tegra I2S can be slave / master.

The second mixer setting above will overwrite the codec clock mode to master.

Did you mean external Codec is Slave, I2S2 is Master and I2S4 is Slave here? Please share you DTS changes.

Could you please share a block diagram with Codec, I2S2 and I2S4 what is your current usecase and what is the requirement?

7

Yes, please see the next diagram.

I have no DTS changes (why would I need those?) I only set everything using the amixer controls.

+-----------------------CUSTOM BOARD---------------------------+
|                                                              |
|              +-------------------------------+               |
|              |                               |               |
|    +--SDIN---+        CODEC (SLAVE)          +---SDIN---+    |
|    |         |                               |          |    |
|    |         +------^-----------------^------+          |    |
|    |                |                 |                 |    |
|    |                |                 |                 |    |
|    |                |                 |                 |    |
|    |                |                 |                 |    |
|    |         +------------FSYNC-------+------+          |    |
|    |         |      |                        |          |    |
|    |         | +----+-----BCLK-------------+ |          |    |
|    |         | |                           | |          |    |
|    |         | |                           | |          |    |
|    |         | |                           | |          |    |
+--------------------------------------------------------------+
     |         | |                           | |          |
     |         | |                           | |          |
  +--v---------+-+----+                  +---v-v----------v--+
  |                   |                  |                   |
  |    I2S2 (MASTER)  |                  |    I2S4 (SLAVE)   |
  |                   |                  |                   |
  +-------------------+                  +-------------------+

As you can see in the diagram I2S2 is master and it is feeding BCKL and FSYNC to both: CODEC and I2S4 (both are slaves). The data to both I2S2 and I2S4 is coming from CODEC.

The problem is that the external custom board is introducing a delay on BCLK and FSYNC so I2S2 and I2S4 are out-of-sync. My question is whether I can loop the BCLK and FSYNC from I2S2 to I2S4 internally instead of going through the external board.

8

Its not possible. But to overcome out-of-sync issue. You can try one of the below approaches if seems feasible.

  • Set Codec as Master and both Tegra I2S as Slave.
  • Set Codec as Slave and both Tegra I2S as Master but connect only one I2Sx LRCK and BCLK to Codec and don’t connect I2Sy.
9

The custom board doesn’t have an oscillator for that, it requires to be slave.

In this case would I2Sx and I2Sy be automatically in sync?

10

Yes it should be, could you please try like that.

11

Yeah, they are definitely not in sync. When configuring both as master and starting a recording on a merge PCM device using a logic analyser I can clearly see that BCLK and FSYNC are not in sync between the two controllers.

13

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