Jetpack 5.0.2 camera driver port leads to tegra-capture-vi timeout

[peter.martienssen]

I ported a camera driver from the previous Jetpack version 4.6.2 to 5.0.2. After adjusting the device tree I now face the problem that the tegra-capture-vi reports a timeout. No camera images are received. I checked data transmission with an oscilloscope. I am using a IMX296 with 1 lane so the data0 Lane shows data transmission.

I do get following error messages:

[ 2663.613160] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 5000 ms
[ 2663.613461] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 2663.614925] (NULL device *): vi_capture_control_message: NULL VI channel received
[ 2663.615171] t194-nvcsi 13e10000.host1x:nvcsi@15a00000: csi5_stream_close: Error in closing stream_id=2, csi_port=2
[ 2663.615436] (NULL device *): vi_capture_control_message: NULL VI channel received
[ 2663.615656] t194-nvcsi 13e10000.host1x:nvcsi@15a00000: csi5_stream_open: VI channel not found for stream- 2 vc- 0
[ 2663.616284] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel

Are the some additional things to do when porting a camera driver to Jetpack 5.0.2?

[ShaneCCC]

Check the pix_clk_hz in device tree to make sure the output data rate > 1.5Gbps
After that get the trace log to analysis.

Skew calibration is required if sensor or deserializer is using DPHY, and the output data rate is > 1.5Gbps.
An initiation deskew signal should be sent by sensor or deserializer to perform the skew calibration. If the deskew signals is not sent, the receiver will stall, and the capture will time out.
You can calculate the output data rate with the following equation:

Output data rate = (sensor or deserializer pixel clock in hertz) * (bits per pixel) / (number of CSI lanes)

[peter.martienssen]

Hello Shane,

I am using an Sony IMX296. Where do I find the pixel clock. I assume it is 74.25 MHz. This leads to:

output data rate: 74250000 * 10 / 1 = 742500000

Is this plausible? I used this setting but the timeout is still there. Which tracelog do you need?

[ShaneCCC]

Check below link for enabling the trace log.

https://elinux.org/Jetson/l4t/Camera_BringUp

[peter.martienssen]

Ok thanks, here is the trace:

# tracer: nop
#
# entries-in-buffer/entries-written: 29/29   #P:4
#
#                                _-----=> irqs-off
#                               / _----=> need-resched
#                              | / _---=> hardirq/softirq
#                              || / _--=> preempt-depth
#                              ||| /     delay
#           TASK-PID     CPU#  ||||   TIMESTAMP  FUNCTION
#              | |         |   ||||      |         |
        v4l2-ctl-4117    [002] ....  3765.894929: tegra_channel_open: vi-output, vc_mipi 10-001a
        v4l2-ctl-4117    [002] ....  3765.895530: tegra_channel_close: vi-output, vc_mipi 10-001a
      vcmipidemo-4118    [002] ....  3765.900398: tegra_channel_open: vi-output, vc_mipi 10-001a
      vcmipidemo-4118    [002] ....  3765.920950: tegra_channel_set_power: vc_mipi 10-001a : 0x1
      vcmipidemo-4118    [002] ....  3765.920965: camera_common_s_power: status : 0x1
      vcmipidemo-4118    [002] ....  3765.920975: tegra_channel_set_power: 13e10000.host1x:nvcsi@15a00000- : 0x1
      vcmipidemo-4118    [002] ....  3765.920977: csi_s_power: enable : 0x1
      vcmipidemo-4118    [002] ....  3765.921063: tegra_channel_capture_setup: vnc_id 0 W 1440 H 1080 fmt c5
      vcmipidemo-4118    [002] ....  3765.927879: tegra_channel_set_stream: enable : 0x1
      vcmipidemo-4118    [002] ....  3765.930818: tegra_channel_set_stream: 13e10000.host1x:nvcsi@15a00000- : 0x1
      vcmipidemo-4118    [002] ....  3765.930821: csi_s_stream: enable : 0x1
      vcmipidemo-4118    [002] ....  3765.931195: tegra_channel_set_stream: vc_mipi 10-001a : 0x1
     kworker/3:0-3807    [003] ....  3765.938686: rtcpu_string: tstamp:118439984296 id:0x04010000 str:"VM0 activating."
     kworker/3:0-3807    [003] ....  3765.994684: rtcpu_nvcsi_intr: tstamp:118440458428 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000001
     kworker/3:0-3807    [003] ....  3765.994687: rtcpu_nvcsi_intr: tstamp:118440458428 class:GLOBAL type:PHY_INTR1 phy:1 cil:0 st:0 vc:0 status:0x00000021
     kworker/3:0-3807    [003] ....  3765.994690: rtcpu_vinotify_event: tstamp:118440631544 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:3790083309504 data:0xcd9ce50010000000
     kworker/3:0-3807    [003] ....  3765.994691: rtcpu_vinotify_event: tstamp:118440631698 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:3790083321280 data:0x0000000031000001
     kworker/3:0-3807    [003] ....  3765.994692: rtcpu_vinotify_event: tstamp:118440631872 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:3790083376384 data:0xcd9ce20010000000
     kworker/3:0-3807    [003] ....  3765.994693: rtcpu_vinotify_event: tstamp:118440632021 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:3790083388320 data:0x0000000031000002
 vi-output, vc_m-4120    [003] ....  3771.092864: tegra_channel_capture_setup: vnc_id 0 W 1440 H 1080 fmt c5
      vcmipidemo-4118    [002] ....  3771.092936: tegra_channel_close: vi-output, vc_mipi 10-001a
      vcmipidemo-4118    [002] ....  3771.094278: tegra_channel_set_stream: enable : 0x0
      vcmipidemo-4118    [002] ....  3771.094281: tegra_channel_set_stream: vc_mipi 10-001a : 0x0
      vcmipidemo-4118    [002] ....  3771.145505: tegra_channel_set_stream: 13e10000.host1x:nvcsi@15a00000- : 0x0
      vcmipidemo-4118    [002] ....  3771.145509: csi_s_stream: enable : 0x0
      vcmipidemo-4118    [002] ....  3771.149917: tegra_channel_set_power: vc_mipi 10-001a : 0x0
      vcmipidemo-4118    [002] ....  3771.149949: camera_common_s_power: status : 0x0
      vcmipidemo-4118    [002] ....  3771.149956: tegra_channel_set_power: 13e10000.host1x:nvcsi@15a00000- : 0x0
      vcmipidemo-4118    [002] ....  3771.149958: csi_s_power: enable : 0x0

[ShaneCCC]

Looks like NVCSI/VI didn’t receive any validate data from sensor.
You may need to probe the signal to confirm it.

[peter.martienssen]

What entry in the trace gives the hint that the received data are not valid? I checked the data0 lane with a oscilloscope and the sensor is sending data. But my oscilloscope isn’t capable to decode the signal itself.

The hole hardware setup was running with the same driver but Jetpack version 4.6.2 and earlier. Where is the difference to Jetpack 5.0.2?

[ShaneCCC]

Looks like the LP00 is too smaller.

[peter.martienssen]

According to the D-PHY spec the LP00 has to be between 40 ns + 4UI and 85 ns + 6UI. In my case 1UI is 1 / 742.5 MHz = 1.34 ns. This leads to a valid LP00 range of 45.38 ns - 93.08 ns. The measured LP00 time duration on my signal is approximately 65 ns. So , I assume this is not causing the problem.

This are my mode0 settings

phy_mode                 = "DPHY";
discontinuous_clk        = "no";
mclk_khz                 = "24000";
pix_clk_hz               = "742500000";
mclk_multiplier          = "9.33";
cil_settletime           = "0";
dpcm_enable              = "false";

Do you have any other ideas?

[ShaneCCC]

Does your pix_clk_hz typo?
If it’s 742500000 than the output data rate > 1.5Gbps

[peter.martienssen]

Ok I used the pix_clk_hz value which I calculated above. Now I changed the value to

pix_clk_hz               = "74250000";

and the image is received. Great!
Unfortunately the image isn’t valid.

Do you have any hints how to fix this? Here is my hole mode0 device tree node:

mode0 {
	num_lanes = "1";
	tegra_sinterface = "serial_c";
	embedded_metadata_height = "2";
	readout_orientation = "0";

	active_w  = "1440";
	active_h   = "1080";
	mode_type = "bayer";
	pixel_phase = "rggb";
	csi_pixel_bit_depth = "10";

	min_gain_val = "0"; 
	max_gain_val = "48000";
	step_gain_val = "100";
	default_gain = "0"; 

	min_exp_time = "1"; 
	max_exp_time = "1000000";
	step_exp_time = "1";
	default_exp_time = "10000";

	min_framerate = "0";
	max_framerate = "60300"; 
	step_framerate = "100";
	default_framerate = "60300"; 

	gain_factor = "1000";
	exposure_factor = "1000000";
	framerate_factor  = "1000";
	inherent_gain = "1";
	min_hdr_ratio = "1";
	max_hdr_ratio = "1";

	line_length  = "0";
	phy_mode = "DPHY";
	discontinuous_clk = "no";
	mclk_khz  = "24000";
	pix_clk_hz  = "74250000";
	mclk_multiplier = "9.33";
	cil_settletime = "0";
	dpcm_enable = "false";
};

[ShaneCCC]

Try below command to boost the clocks than launch camera to check.

sudo su
echo 1 > /sys/kernel/debug/bpmp/debug/clk/vi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/isp/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/emc/mrq_rate_locked
cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
cat /sys/kernel/debug/bpmp/debug/clk/isp/max_rate | tee  /sys/kernel/debug/bpmp/debug/clk/isp/rate
cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate
cat /sys/kernel/debug/bpmp/debug/clk/emc/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/emc/rate

[peter.martienssen]

Thanks, that did the trick. I get an pretty image. What do I have to do to make this settings persistent?

[ShaneCCC]

Maybe have script at system starting up.