Hi support,
We are using the HDMI to CSI-2 Bridge (From a third party manufacturer) on a Jetson TK1.
The driver tc358743 is used for this card.
Infos:
Kernel version : 3.10.40 R21.5
tc358743 chip (HDMI 2 CSI bridge).
After some minutes of grabbing V4L frames, the following logs appears on kernel log:
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.273041] vi vi.0: wait: CSI_A syncpt timeout, syncpt = 287584, err = -11
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.281231] TEGRA_CSI_CSI_CIL_A_STATUS 0x00000012
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.286446] TEGRA_CSI_CSI_CILA_STATUS 0x00060060
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.292137] TEGRA_CSI_CSI_CIL_B_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.297282] TEGRA_CSI_CSI_CIL_C_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.302831] TEGRA_CSI_CSI_CIL_D_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.307930] TEGRA_CSI_CSI_CIL_E_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.313422] TEGRA_CSI_CSI_PIXEL_PARSER_A_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.319315] TEGRA_CSI_CSI_PIXEL_PARSER_B_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.325846] TEGRA_VI_CSI_0_ERROR_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.331024] TEGRA_VI_CSI_1_ERROR_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.535982] vi vi.0: start: CSI_A syncpt timeout, syncpt = 287585, err = -11
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.543439] TEGRA_CSI_CSI_CIL_A_STATUS 0x00000012
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.548589] TEGRA_CSI_CSI_CILA_STATUS 0x00060060
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.553657] TEGRA_CSI_CSI_CIL_B_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.558793] TEGRA_CSI_CSI_CIL_C_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.563919] TEGRA_CSI_CSI_CIL_D_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.569022] TEGRA_CSI_CSI_CIL_E_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.574123] TEGRA_CSI_CSI_PIXEL_PARSER_A_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.579997] TEGRA_CSI_CSI_PIXEL_PARSER_B_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.585841] TEGRA_VI_CSI_0_ERROR_STATUS 0x00000000
Mar 8 13:33:09 qs-labo-001 kernel: [ 8448.591002] TEGRA_VI_CSI_1_ERROR_STATUS 0x00000000
...
...
In our software, we lose some frames due to this synchronization timeout.
After a look on the kernel, these logs are generated by these functions (vi2_capture_start and vi2_capture_wait).
The synchronization timeout is detected by the method nvhost_syncpt_wait_timeout_ext.
Here is the patch we applied on vi2.c in order to work with tc358743:
--- a/drivers/media/platform/soc_camera/tegra_camera/vi2.c
+++ b/drivers/media/platform/soc_camera/tegra_camera/vi2.c
@@ -335,6 +335,7 @@
#define CLKSELE (1 << 21)
#define MIPI_CAL_BASE 0x700e3000
+static void vi2_sw_reset(struct tegra_camera_dev *cam);
static const struct regmap_config mipi_cal_config = {
.reg_bits = 32,
@@ -609,8 +610,8 @@ static int vi2_capture_setup_csi_0(struct tegra_camera_dev *cam,
0x3 | (0x1 << 5) | (0x40 << 8));
#endif
- TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILA_CONTROL0, 0x9);
- TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILB_CONTROL0, 0x9);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILA_CONTROL0, 0x49);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILB_CONTROL0, 0x49);
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_PPA_COMMAND, 0xf007);
TC_VI_REG_WT(cam, TEGRA_CSI_CSI_PIXEL_PARSER_A_INTERRUPT_MASK, 0x0);
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_A_CONTROL0, 0x280301f0);
@@ -650,7 +651,9 @@ static int vi2_capture_setup_csi_0(struct tegra_camera_dev *cam,
(icd->current_fmt->code == V4L2_MBUS_FMT_VYUY8_2X8) ||
(icd->current_fmt->code == V4L2_MBUS_FMT_YUYV8_2X8) ||
(icd->current_fmt->code == V4L2_MBUS_FMT_YVYU8_2X8)) {
- /* TBD */
+ format = TEGRA_IMAGE_FORMAT_T_U8_Y8__V8_Y8;
+ data_type = TEGRA_IMAGE_DT_YUV422_8;
+ image_size = icd->user_width * 2;
} else if ((icd->current_fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8) ||
(icd->current_fmt->code == V4L2_MBUS_FMT_SGBRG8_1X8)) {
format = TEGRA_IMAGE_FORMAT_T_L8;
@@ -663,8 +666,7 @@ static int vi2_capture_setup_csi_0(struct tegra_camera_dev *cam,
image_size = (icd->user_width * 10) >> 3;
}
- TC_VI_REG_WT(cam, TEGRA_VI_CSI_0_IMAGE_DEF,
- (cam->tpg_mode ? 0 : 1 << 24) | (format << 16) | 0x1);
+ TC_VI_REG_WT(cam, TEGRA_VI_CSI_0_IMAGE_DEF, ((format << 16) | 0x1));
TC_VI_REG_WT(cam, TEGRA_VI_CSI_0_CSI_IMAGE_DT, data_type);
@@ -709,10 +711,10 @@ static int vi2_capture_setup_csi_1(struct tegra_camera_dev *cam,
#endif
if (pdata->port == TEGRA_CAMERA_PORT_CSI_B) {
- TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILC_CONTROL0, 0x9);
- TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILD_CONTROL0, 0x9);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILC_CONTROL0, 0x49);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILD_CONTROL0, 0x49);
} else if (pdata->port == TEGRA_CAMERA_PORT_CSI_C)
- TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILE_CONTROL0, 0x9);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILE_CONTROL0, 0x49);
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_PPB_COMMAND, 0xf007);
TC_VI_REG_WT(cam, TEGRA_CSI_CSI_PIXEL_PARSER_B_INTERRUPT_MASK, 0x0);
@@ -756,7 +758,9 @@ static int vi2_capture_setup_csi_1(struct tegra_camera_dev *cam,
(icd->current_fmt->code == V4L2_MBUS_FMT_VYUY8_2X8) ||
(icd->current_fmt->code == V4L2_MBUS_FMT_YUYV8_2X8) ||
(icd->current_fmt->code == V4L2_MBUS_FMT_YVYU8_2X8)) {
- /* TBD */
+ format = TEGRA_IMAGE_FORMAT_T_U8_Y8__V8_Y8;
+ data_type = TEGRA_IMAGE_DT_YUV422_8;
+ image_size = icd->user_width * 2;
} else if ((icd->current_fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8) ||
(icd->current_fmt->code == V4L2_MBUS_FMT_SGBRG8_1X8)) {
format = TEGRA_IMAGE_FORMAT_T_L8;
@@ -769,8 +773,7 @@ static int vi2_capture_setup_csi_1(struct tegra_camera_dev *cam,
image_size = icd->user_width * 10 / 8;
}
- TC_VI_REG_WT(cam, TEGRA_VI_CSI_1_IMAGE_DEF,
- (cam->tpg_mode ? 0 : 1 << 24) | (format << 16) | 0x1);
+ TC_VI_REG_WT(cam, TEGRA_VI_CSI_1_IMAGE_DEF, ((format << 16) | 0x1));
TC_VI_REG_WT(cam, TEGRA_VI_CSI_1_CSI_IMAGE_DT, data_type);
@@ -957,7 +960,7 @@ static void vi2_capture_error_status(struct tegra_camera_dev *cam)
}
static int vi2_capture_start(struct tegra_camera_dev *cam,
- struct tegra_camera_buffer *buf)
+ struct tegra_camera_buffer *buf)
{
struct soc_camera_device *icd = buf->icd;
struct soc_camera_subdev_desc *ssdesc = &icd->sdesc->subdev_desc;
@@ -970,6 +973,7 @@ static int vi2_capture_start(struct tegra_camera_dev *cam,
if (err < 0)
return err;
+ /* Only wait on CSI frame end syncpt if we're using CSI. */
if (port == TEGRA_CAMERA_PORT_CSI_A) {
if (!nvhost_syncpt_read_ext_check(cam->ndev,
cam->syncpt_id_csi_a, &val))
@@ -980,6 +984,12 @@ static int vi2_capture_start(struct tegra_camera_dev *cam,
TC_VI_REG_WT(cam, TEGRA_VI_CFG_VI_INCR_SYNCPT,
VI_CSI_PPA_FRAME_START | cam->syncpt_id_csi_a);
TC_VI_REG_WT(cam, TEGRA_VI_CSI_0_SINGLE_SHOT, 0x1);
+ err = nvhost_syncpt_wait_timeout_ext(cam->ndev,
+ cam->syncpt_id_csi_a,
+ cam->syncpt_csi_a,
+ TEGRA_SYNCPT_CSI_WAIT_TIMEOUT,
+ NULL,
+ NULL);
} else if (port == TEGRA_CAMERA_PORT_CSI_B ||
port == TEGRA_CAMERA_PORT_CSI_C) {
if (!nvhost_syncpt_read_ext_check(cam->ndev,
@@ -991,8 +1001,30 @@ static int vi2_capture_start(struct tegra_camera_dev *cam,
TC_VI_REG_WT(cam, TEGRA_VI_CFG_VI_INCR_SYNCPT,
VI_CSI_PPB_FRAME_START | cam->syncpt_id_csi_b);
TC_VI_REG_WT(cam, TEGRA_VI_CSI_1_SINGLE_SHOT, 0x1);
+ err = nvhost_syncpt_wait_timeout_ext(cam->ndev,
+ cam->syncpt_id_csi_b,
+ cam->syncpt_csi_b,
+ TEGRA_SYNCPT_CSI_WAIT_TIMEOUT,
+ NULL,
+ NULL);
}
+ /* Mark SOF flag to Zero after we captured the FIRST frame */
+ if (cam->sof)
+ cam->sof = 0;
+ /* Capture syncpt timeout err, then dump error status */
+ if (err) {
+ if (port == TEGRA_CAMERA_PORT_CSI_A)
+ dev_err(&cam->ndev->dev,
+ "start: CSI_A syncpt timeout, syncpt = %d, err = %d\n",
+ cam->syncpt_csi_a, err);
+ else if (port == TEGRA_CAMERA_PORT_CSI_B ||
+ port == TEGRA_CAMERA_PORT_CSI_C)
+ dev_err(&cam->ndev->dev,
+ "start: CSI_B/CSI_C syncpt timeout, syncpt = %d, err = %d\n",
+ cam->syncpt_csi_b, err);
+ vi2_capture_error_status(cam);
+ }
return err;
}
@@ -1031,12 +1063,12 @@ static int vi2_capture_wait(struct tegra_camera_dev *cam,
if (err) {
if (port == TEGRA_CAMERA_PORT_CSI_A)
dev_err(&cam->ndev->dev,
- "CSI_A syncpt timeout, syncpt = %d, err = %d\n",
+ "wait: CSI_A syncpt timeout, syncpt = %d, err = %d\n",
cam->syncpt_csi_a, err);
else if (port == TEGRA_CAMERA_PORT_CSI_B ||
port == TEGRA_CAMERA_PORT_CSI_C)
dev_err(&cam->ndev->dev,
- "CSI_B/CSI_C syncpt timeout, syncpt = %d, err = %d\n",
+ "wait: CSI_B/CSI_C syncpt timeout, syncpt = %d, err = %d\n",
cam->syncpt_csi_b, err);
vi2_capture_error_status(cam);
}
@@ -1107,13 +1139,83 @@ static int vi2_capture_done(struct tegra_camera_dev *cam, int port)
static int vi2_capture_stop(struct tegra_camera_dev *cam, int port)
{
- u32 reg = (port == TEGRA_CAMERA_PORT_CSI_A) ?
- TEGRA_CSI_PIXEL_STREAM_PPA_COMMAND :
- TEGRA_CSI_PIXEL_STREAM_PPB_COMMAND;
+ u32 val;
+ int err = 0;
- TC_VI_REG_WT(cam, reg, 0xf002);
+ if (port == TEGRA_CAMERA_PORT_CSI_A) {
+ if (!nvhost_syncpt_read_ext_check(cam->ndev,
+ cam->syncpt_id_csi_a, &val))
+ cam->syncpt_csi_a = nvhost_syncpt_incr_max_ext(
+ cam->ndev,
+ cam->syncpt_id_csi_a, 1);
- return 0;
+ /*
+ * Make sure recieve VI_MWA_ACK_DONE of the last frame before
+ * stop and dequeue buffer, otherwise MC error will shows up
+ * for the last frame.
+ */
+ TC_VI_REG_WT(cam, TEGRA_VI_CFG_VI_INCR_SYNCPT,
+ VI_MWA_ACK_DONE | cam->syncpt_id_csi_a);
+
+ /*
+ * Ignore error here and just stop pixel parser after waiting,
+ * even if it's timeout
+ */
+ err = nvhost_syncpt_wait_timeout_ext(cam->ndev,
+ cam->syncpt_id_csi_a,
+ cam->syncpt_csi_a,
+ TEGRA_SYNCPT_CSI_WAIT_TIMEOUT,
+ NULL,
+ NULL);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_PPA_COMMAND, 0xf002);
+ } else if (port == TEGRA_CAMERA_PORT_CSI_B ||
+ port == TEGRA_CAMERA_PORT_CSI_C) {
+ if (!nvhost_syncpt_read_ext_check(cam->ndev,
+ cam->syncpt_id_csi_b, &val))
+ cam->syncpt_csi_b = nvhost_syncpt_incr_max_ext(
+ cam->ndev,
+ cam->syncpt_id_csi_b, 1);
+
+ /*
+ * Make sure recieve VI_MWB_ACK_DONE of the last frame before
+ * stop and dequeue buffer, otherwise MC error will shows up
+ * for the last frame.
+ */
+ TC_VI_REG_WT(cam, TEGRA_VI_CFG_VI_INCR_SYNCPT,
+ VI_MWB_ACK_DONE | cam->syncpt_id_csi_b);
+
+ /*
+ * Ignore error here and just stop pixel parser after waiting,
+ * even if it's timeout
+ */
+ err = nvhost_syncpt_wait_timeout_ext(cam->ndev,
+ cam->syncpt_id_csi_b,
+ cam->syncpt_csi_b,
+ TEGRA_SYNCPT_CSI_WAIT_TIMEOUT,
+ NULL,
+ NULL);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_PPB_COMMAND, 0xf002);
+ }
+
+ if (err){
+ if (port == TEGRA_CAMERA_PORT_CSI_A)
+ dev_err(&cam->ndev->dev,
+ "stop: CSI_A syncpt timeout, syncpt = %d, err = %d\n",
+ cam->syncpt_csi_a, err);
+ else if (port == TEGRA_CAMERA_PORT_CSI_B ||
+ port == TEGRA_CAMERA_PORT_CSI_C)
+ dev_err(&cam->ndev->dev,
+ "stop: CSI_B/CSI_C syncpt timeout, syncpt = %d, err = %d\n",
+ cam->syncpt_csi_b, err);
+ vi2_capture_error_status(cam);
+ vi2_sw_reset(cam);
+ vi2_free_syncpts(cam);
+ vi2_init_syncpts(cam);
+ }
+ // set sof to 1 so that when streamon is again called, CSI is configured again
+ cam->sof = 1;
+
+ return err;
}
/* Reset VI2/CSI2 when activating, no sepecial ops for deactiving */
Questions:
- Is it a known issue on kernel 3.10.40 R21.5 ?
- If it is a known issue, is there an available kernel patch to solve this problem ?
Here is the log when the vi2 is initialized:
Mar 8 09:47:41 qs-labo-001 kernel: [ 178.706891] tegra_camera: version magic '3.10.40-gafe5771-dirty SMP preempt mod_unload ARMv7 p2v8 ' should be '3.10.40-g83c7c62-dirty SMP preempt mod_unload ARMv7 p2v8 '
Mar 8 09:47:58 qs-labo-001 kernel: [ 195.626195] vi vi.0: initialized
Mar 8 09:47:58 qs-labo-001 kernel: [ 195.626246] soc-camera-pdrv soc-camera-pdrv.4: Probing soc-camera-pdrv.4
Mar 8 09:47:58 qs-labo-001 kernel: [ 195.634135] tc358743_probe : CHIPID=0x00 REVISIONID=0x00
Mar 8 09:47:59 qs-labo-001 kernel: [ 197.248559] Write EDID: 256 (1)
Mar 8 09:48:00 qs-labo-001 kernel: [ 197.367689] Activate EDID Mode DDC2B 1 0
Mar 8 09:48:00 qs-labo-001 kernel: [ 197.369093] tc358743_enable_interrupts: cable connected = 1
Mar 8 09:48:00 qs-labo-001 kernel: [ 197.991056] tc358743_probe : force initial interrupt mask: 0x043f : Reset Needed ?
Mar 8 09:48:00 qs-labo-001 kernel: [ 197.998711] tc358743_init_interrupts : Done
Mar 8 09:48:00 qs-labo-001 kernel: [ 197.999302] tc358743_probe : IRQ 403 5V Present
Mar 8 09:48:00 qs-labo-001 kernel: [ 197.999379] tc358743_probe : devm_request_threaded_irq succeed
Mar 8 09:48:00 qs-labo-001 kernel: [ 197.999974] tc358743_enable_interrupts: cable connected = 1
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.005226] tc358743_g_edid : Dump EDID lenRead=256 Mode=2
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.006109] 00 ff ff ff ff ff ff 00 46 65 00 50 01 00 00 00 01
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.021077] 1a 01 03 a2 00 00 00 02 ee 95 a3 54 4c 99 26 0f
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.035165] 50 54 04 43 00 01 01 01 01 01 01 01 01 01 01 01
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.049241] 01 01 01 01 01 02 3a 80 18 71 38 2d 40 58 2c 45
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.063322] 00 c4 8e 21 00 00 1e 00 00 00 fc 00 51 53 20 45
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.077411] 4e 47 49 4e 45 20 48 49 44 00 00 00 fd 00 18 4b
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.091489] 0f 51 09 00 0a 20 20 20 20 20 20 00 00 00 fe 00
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.105581] 48 49 44 56 32 30 31 36 51 31 20 20 20 01 a1 02
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.119658] 03 16 f0 41 90 23 09 07 07 83 01 00 00 67 03 0c
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.133735] 00 00 00 b8 21 02 3a 80 18 71 38 2d 40 58 58 45
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.147810] 00 80 38 74 00 00 18 00 00 00 00 00 00 00 00 00
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.161913] 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.175990] 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.190082] 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.204164] 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.218249] 00 00 00 00 00 00 00 00 00 00 00 00 00 70 84
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.234663] Link status : Signal OK Sync OK DVI PHY with DE PLL lock 5V Yes<5>[ 198.234732] vi vi.0: Supporting mbus format code 0x2006 using YUV422 (UYVY) packed
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.234737] vi vi.0: Supporting mbus format code 0x2006 using YUV422 (VYUY) packed
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.234742] vi vi.0: Supporting mbus format code 0x2006 using YUV422 (YUYV) packed
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.234747] vi vi.0: Supporting mbus format code 0x2006 using YUV422 (YVYU) packed
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.234751] vi vi.0: Supporting mbus format code 0x2006 using YUV420 (YU12) planar
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.234756] vi vi.0: Supporting mbus format code 0x2006 using YVU420 (YV12) planar
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.235758] vi vi.0: Tegra camera driver loaded.
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.238851] vi vi.1: initialized
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.238928] soc-camera-pdrv soc-camera-pdrv.1: Probing soc-camera-pdrv.1
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.241462] tc358743_s_power : state = 1
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.245355] vi vi.1: Tegra camera driver loaded.
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.248932] Image is 1920x1080@60, ~1991 Gbps bandwidth (~996MHz/lane) [Wrong width]
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.248939] Wrong width (1920 vs 640)
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.254260] Setting pll to frequency 1075 (1075) MHz
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.264739] tc358743_enable_interrupts: cable connected = 1
Mar 8 09:48:00 qs-labo-001 kernel: [ 198.267639] Starting CSI 2 LANS
Mar 8 09:48:01 qs-labo-001 kernel: [ 198.280701] tc358743_s_power : state = 0
PS: Previously we used the kernel 3.10.40 R21.4 where tearing appears on V4L grabbed frames in some use case.
With the kernel version (3.10.40 R21.5), the tearing effect disappears or are not too obvious to see .