Mipi-driver : frame start syncpt timeout!0

Autonomous Machines Jetson & Embedded Systems Jetson Nano
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1

Hi,
I was developing a Jetson nano mipi driver for a sensor module which transmit data in RAW 8 format. When am reading a data using v4l2-ctl it populates frame start syncpt timeout!0. Here I have attached my dmesg in below.

Thanks.

rsz_1syncpt
rsz_1syncpt718Ă—508 204 KB

3

hello albinraj.c0519,

there’s timeout from VI side for waiting start-of-frame.
is it possible to arrange hardware resources to probe the MIPI signaling?
thanks

4

Hi Jerry,
Thanks for your reply. Sorry I don’t have any hardware resource to probe the MIPI signals. Is any other method to solve this issue.

5

hello albinraj.c0519,

may I know which JetPack release you’re working with; there’s RAW8 format type definition with the latest JetPack release.
you may review the default support pixel formats types in the VI drivers, please extend the support formats if necessary.
for example,
$L4T_Sources/r32.4.3/Linux_for_Tegra/source/public/kernel/nvidia/drivers/media/platform/tegra/camera/camera_common.c

static const struct camera_common_colorfmt camera_common_color_fmts[] = 
{ 
... 
       {
                MEDIA_BUS_FMT_SRGGB8_1X8,
                V4L2_COLORSPACE_SRGB,
                V4L2_PIX_FMT_SRGGB8,
        },
...
}

since VI engine allocate software buffer following DT property values.
please refer to Individual Imaging Device session and review your device tree properties settings.
thanks

6

Hi Jerry,
Thanks for your reply. I am using r32.4.3 kernel source and in my camera_common.c file RAW8 format type definition is present but when am trying to build for RAW8 format, its populating unsupported error . Here i have attached my debug trace for driver when am reading using RAW10 format. And also I have attached my dtsi file changes as sensor spec.
Could you please give any idea to move forward using below attachment.
thank you so much.

rsz_dtsi
rsz_dtsi1050Ă—755 72.3 KB
rsz_error
rsz_error951Ă—959 297 KB
WhatsApp Image 2020-10-14 at 6.06.13 PM
WhatsApp Image 2020-10-14 at 6.06.13 PM1280Ă—960 124 KB
and RAW8 format error picture in below.

7

hello albinraj.c0519,

you may refer to below kernel sources.

$L4T_Sources/r32.4.3/Linux_for_Tegra/source/public/kernel/nvidia/drivers/media/platform/tegra/camera/sensor_common.c
for example,

static int extract_pixel_format(const char *pixel_t, u32 *format){...}

you should also extend the support format type to add RAW8 supports.
thanks

8

Hi Jerry,
Thank you so much for your reply. I have changed my sensor_common.c and imx219 dtsi file and it compiled successfully. But when am reading data from sensor getting same issue(frame start syncpt timeout!0). When am executing command $ v4l2-ctl --device /dev/video0 --list-formats-ext, I can’t see “bayer_rggb” which i made change in dtsi file(Is it really changed to RAW8 format).
Could you please check the attachment and give me any idea.

rsz_1pixel
rsz_1pixel1006Ă—838 143 KB
rsz_oct15
rsz_raw8
rsz_raw8992Ă—796 74.3 KB

Thank you so much.

9

hello albinraj.c0519,

please also looking into below,
$L4T_Sources/r32.4.3/Linux_for_Tegra/source/public/kernel/nvidia/drivers/media/platform/tegra/camera/sensor_common.c
please examine from driver side to ensure VI driver has recognize the format types as RAW8.
for example,

static int sensor_common_parse_image_props()
{
...
    sprintf(pix_format, "%s_%s%d", mode_str, phase_str, depth);
    temp_str = pix_format;
10

Hi Jerry,
Thanks for your reply, Actually when I build my kernel again it was change to RAW8 format. And also I have examined the pin connection between sensor and Jetson Nano board there is a swap in sensor board so we are working on it. Once we clear it, I will update you.
One doubt I have Jerry. Suppose a senor send 10 packets per second then how to calculate physical_w, physical_h,active_w, active_h and line_length to update dtsi file. Packet length is 256.

Thank You

11

hello albinraj.c0519,

you may check sensor specification for physical width and height values.
please refer to the sensor readout diagram for the active regions of active_w and active_h property settings; line_length were used for pixel line width horizontal timing size, it must be greater than or equal to active_w.
BTW,
please refer to Sensor Software Driver Programming Guide for the details.
thanks

12

Hi Jerry,
Thanks for your reply, We have cleared P and N swaping issue still it populating frame start syncpt timeout!0 error.
Kindly suggest any solution for it.
Thanks

13

hello albinraj.c0519,

there’re two phases you may looking to for issue debug.

  • from the hardware side,
    may I know is it possible to arrange hardware resources for probing the MIPI signaling? it could helps to narrow down the issue by checking whether sensor is actually streaming or not.
    is not, you should check the regulator settings or clock source for the sensor modules.

  • from the software side,
    please refer to Supported Modes and Power Efficiency to configure system as maximum performance mode.
    you may also refer to Sensor Pixel Clock session to review your pix_clk_hz property setting.

thanks

14

Hi Jerry,
Thanks for your reply. rsz_data_lane1 I have attached DSO screen shot of Data receiving in Jetson Nano Data Lane 1.
Pixel clock I have calculated using formula (Data rate(MBPs) * num of lane)/Number of bits.

Thanks.

15

hello albinraj.c0519,

may I know what’s the actual stream it is?
I’ve notice that you’re setting active_h=1 for the sensor mode resolution.

please also refer to Applications Using V4L2 IOCTL Directly by using V4L2 IOCTL to verify basic functionality during sensor bring-up.
thanks

16

Hi Jerry,
My custom sensor send 4 packets in one second each packet length is 256. that why I gave active_h=1 and active_w=256. Data rate is 225MBps.
Is my configuration is correct.

Thanks

17

hello albinraj.c0519,

BTW, how about the embedded metadata height property settings.
is your sensor signaling also sending two rows of embedded metadata?

18

Hi Jerry,
Thanks for your reply. Sensor not sending any embedded metadata it’s my mistake and I have changed embedded_metadata_height = “0”. I will check this specification and let you know.
One more doubt Jerry. Is any command there to check dtsi file updates done or not from Jetson nano , once OS is updated.
Thanks
Albin Raj

19

hello albinraj.c0519,

  1. you may check the kernel messages for the source path of device tree,
    for example,
    it’s by default generated from the build machine, that’ll changed once you’ve update the device tree binary.
$ dmesg | grep DTS
[    0.212258] DTS File Name: /dvs/git/dirty/git-master_linux/kernel/kernel-4.9/arch/arm64/boot/dts/../../../../../../hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0000-p3449-0000-b00.dts
  1. you may also able to check device tree properties from system node, please grant root permission then you’ll be able to check them,
    for example,
$ sudo -i 
# cd /sys/firmware/devicetree/base/host1x/i2c@546c0000/rbpcv2_imx219_a@10/
# cat mode0/embedded_metadata_height
2
  1. the other approach is extract the binary, and disassembler the dtb binary into text file for checking,
    for example,
    $ dtc -I dtb -O dts -o temp.txt tegra210-p3448-0000-p3449-0000-b00.dtb
20

Hi Jerry,
Thanks for your reply. I have updated my OS with zero embedded metadata. Still its populating frame start syncpt timeout!0 error.
I have tried command
$ v4l2-ctl --set-fmt-video=width=256,height=1,pixelformat=RG8 --stream-mmap --stream-count=1 -d /dev/video0 --stream-to=ov5693.raw
When am executing above command it get hang.
Could you please check my dtsi file which i attached and give any idea .

Thank youtegra210-camera-rbpcv2-imx219_dtsi.txt (8.9 KB)

21

hello albinraj.c0519,

may I know had you also tried the software approach as mentioned in post #13 to configure system as maximum performance mode?