VI cannot recv any data form tc358743

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin NX
1

Hi,

i am try to implenment a HDMI2CSI caputre card on the orin nx bord. the capture card seems work fine, cause i can see the log-status fine. But the CSI cannot recieve any data, and result in a timeout error. the kernel logout look like below. i do some log on the kernel vi and csi code side.

[ 270.155848] tc358743 10-000f: -----Chip status-----
[ 270.156044] tc358743 10-000f: Chip ID: 0x00
[ 270.156239] tc358743 10-000f: Chip revision: 0x00
[ 270.156242] tc358743 10-000f: Reset: IR: 1, CEC: 1, CSI TX: 0, HDMI: 0
[ 270.156244] tc358743 10-000f: Sleep mode: off
[ 270.156245] tc358743 10-000f: Cable detected (+5V power): no
[ 270.156417] tc358743 10-000f: DDC lines enabled: yes
[ 270.156587] tc358743 10-000f: Hotplug enabled: no
[ 270.156782] tc358743 10-000f: CEC enabled: no
[ 270.156783] tc358743 10-000f: -----Signal status-----
[ 270.156784] tc358743 10-000f: TMDS signal detected: yes
[ 270.156786] tc358743 10-000f: Stable sync signal: no
[ 270.156787] tc358743 10-000f: PHY PLL locked: yes
[ 270.156788] tc358743 10-000f: PHY DE detected: yes
[ 270.157131] tc358743 10-000f: tc358743_get_detected_timings: no sync on signal
[ 270.157132] tc358743 10-000f: No video detected
[ 270.157135] tc358743 10-000f: Configured format: 1920x1080p30.00 (2200x1125)
[ 270.157137] tc358743 10-000f: horizontal: fp = 88, +sync = 44, bp = 148
[ 270.157139] tc358743 10-000f: vertical: fp = 4, +sync = 5, bp = 36
[ 270.157140] tc358743 10-000f: pixelclock: 74250000
[ 270.157143] tc358743 10-000f: flags (0x92): CAN_REDUCE_FPS CE_VIDEO HAS_CEA861_VIC
[ 270.157145] tc358743 10-000f: standards (0x1): CEA
[ 270.157146] tc358743 10-000f: CEA-861 VIC: 34
[ 270.157147] tc358743 10-000f: -----CSI-TX status-----
[ 270.157149] tc358743 bps_pr_lane :=594000000!
[ 270.157150] tc358743 pdata->refclk_hz :=27000000!
[ 270.157151] tc358743 10-000f: Lanes needed: 2
[ 270.157152] tc358743 10-000f: Lanes in use: 2
[ 270.157351] tc358743 10-000f: Waiting for particular sync signal: no
[ 270.157579] tc358743 10-000f: Transmit mode: no
[ 270.157791] tc358743 10-000f: Receive mode: no
[ 270.157994] tc358743 10-000f: Stopped: no
[ 270.157996] tc358743 10-000f: Color space: YCbCr 422 16-bit
[ 270.158170] tc358743 10-000f: -----DVI-D status-----
[ 270.158172] tc358743 10-000f: HDCP encrypted content: no
[ 270.158173] tc358743 10-000f: Input color space: RGB full range
[ 271.170433] tc358743 10-000f: tc358743_hdmi_sys_int_handler: Tx 5V power present: yes
[ 271.170441] tc358743 10-000f: tc358743_enable_edid:
[ 271.170446] tc358743 10-000f: tc358743_enable_interrupts: cable connected = 1
[ 271.171579] tc358743 10-000f: tc358743_isr: Unhandled IntStatus interrupts: 0x200
[ 271.273245] tc358743 10-000f: tc358743_delayed_work_enable_hotplug:
[ 272.192710] tc358743 10-000f: enable_stream: disable
[ 272.193750] tc358743 10-000f: tc358743_hdmi_clk_int_handler: DE size or position has changed
[ 272.196228] tc358743 10-000f: enable_stream: disable
[ 272.197175] tc358743 10-000f: tc358743_hdmi_sys_int_handler: HDMI->DVI change detected
[ 272.197514] tc358743 10-000f: tc358743_hdmi_sys_int_handler: DVI->HDMI change detected
[ 273.214111] tc358743 10-000f: tc358743_hdmi_cbit_int_handler: Audio present changed
[ 278.333763] tc358743 10-000f: tc358743_hdmi_cbit_int_handler: Audio present changed
[ 279.750394] tc358743 10-000f: tc358743_g_input_status: status = 0x0
[ 279.752654] tc358743 10-000f: tc358743_query_dv_timings: 1920x1080p30.00 (2200x1125)
[ 279.752666] tc358743 10-000f: tc358743_s_dv_timings: 1920x1080p30.00 (2200x1125)
[ 279.752669] tc358743 10-000f: enable_stream: disable
[ 279.753587] tc358743 10-000f: tc358743_set_pll:
[ 279.753591] tc358743 bps_pr_lane :=594000000!
[ 279.753593] tc358743 pdata->refclk_hz :=27000000!
[ 279.753595] tc358743 10-000f: tc358743_set_csi:
[ 279.763672] vb2_start_streaming
[ 279.763682] vi csi == NULL
[ 279.764216] tegra-camrtc-capture-vi tegra-capture-vi: sucess to power on vi channel2
[ 279.772239] tegra-camrtc-capture-vi tegra-capture-vi: related csi ptr is NULL
[ 279.779603] vi power on,0
[ 279.779605] vi_start_streaming,4
[ 279.779611] video4linux video0: vi5_channel_start_streaming4
[ 279.779612] video4linux video0: vi5_channel_start_streaming,no bypass
[ 279.779734] video4linux video0: vi5_channel_open0
[ 279.786208] tegra-camrtc-capture-vi tegra-capture-vi: vi valid pors num is :1,total ports is :1
[ 279.789218] bwmgr API not supported
[ 279.795260] tegra-camrtc-capture-vi tegra-capture-vi: test vi port 0
[ 279.813585] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_start_streaming: csi_pt=2, st_id=2, vc_id=0, pg_mode=0x0,port_idx0,num_lanes2
[ 279.813590] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_stream_set_config: stream_id=2, csi_port=2,chan->of_node->full_namechannel@1
[ 279.813592] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: cil_settletime is pulled from device of_node
[ 279.813595] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: cil_settletime pulled from device of_node is 10
[ 279.813599] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi cil_settletime is10,lane_polarity is 0,phy_mode is0
[ 279.813651] verify_capture_control_response!
[ 279.813652] verify_capture_control_response result is0!
[ 279.813654] csi clk_freq is102000000!
[ 279.813655] csi5_send_control_message stream_id2!,vi_port0
[ 279.813926] verify_capture_control_response!
[ 279.813928] verify_capture_control_response result is0!
[ 279.813931] tc358743 10-000f: enable_stream: enable
[ 282.296451] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 282.305616] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 282.316085] tegra-camrtc-capture-vi tegra-capture-vi: vi valid pors num is :1,total ports is :1
[ 282.325142] tegra-camrtc-capture-vi tegra-capture-vi: test vi port 0
[ 282.331793] tegra-camrtc-capture-vi tegra-capture-vi: vi valid pors num is :1,total ports is :1
[ 282.340845] tegra-camrtc-capture-vi tegra-capture-vi: test vi port 0
[ 282.347490] tegra-camrtc-capture-vi tegra-capture-vi: vi valid pors num is :1,total ports is :1
[ 282.356527] tegra-camrtc-capture-vi tegra-capture-vi: test vi port 0
[ 282.363169] tegra_vi_chan is NULL!
[ 282.363172] (NULL device *): vi_capture_control_message: NULL VI channel received
[ 282.370873] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_stream_close: Error in closing stream_id=2, csi_port=2
[ 282.381529] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_start_streaming: csi_pt=2, st_id=2, vc_id=0, pg_mode=0x0,port_idx0,num_lanes2
[ 282.381536] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_stream_set_config: stream_id=2, csi_port=2,chan->of_node->full_namechannel@1
[ 282.381538] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: cil_settletime is pulled from device of_node
[ 282.381544] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: cil_settletime pulled from device of_node is 10
[ 282.381547] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi cil_settletime is10,lane_polarity is 0,phy_mode is0
[ 282.381549] tegra_vi_chan is NULL!
[ 282.381550] (NULL device *): vi_capture_control_message: NULL VI channel received
[ 282.389248] csi clk_freq is102000000!
[ 282.389251] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_stream_open: VI channel not found for stream- 2 csi_port-2 vc- 0
[ 282.401017] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[ 282.410564] tc358743 10-000f: enable_stream: disable
[ 282.411124] tc358743 bps_pr_lane :=594000000!
[ 282.411128] tc358743 pdata->refclk_hz :=27000000!
[ 282.411130] tc358743 10-000f: tc358743_set_csi:
[ 282.415640] verify_capture_control_response!
[ 282.415644] verify_capture_control_response result is0!

i dig into the tegra camera platform source code, find out there is a “struct camera_common_pdata” which contan a lot of camera propertis , but the tc358743’s dirver does not have one ,many properties like tegra_sinterface or sedes_clk_freq can’t even pass to the tegra vi channel. how can i make this work, if notice there is a pass throw the camera init process with (sdata==NULL), which the tc358743 dirver goes, but it does not work. BTW, the HDMI2CSI works fine on a raspi well.

Can any body help me, Thanks a lot!

3

Try another connector if you are using cam0 than try cam1.

Thanks

6

sorry my carrier board has an error with the cam0, they misconnect the csi0_clk in the offical csi1_clk place. so i use cam1 with the csi2_data0 and csi2_data1 and csi2_clk。 i made my driver changed to use the tegracam_device struct, now it can obtain those mode properties from the device-tree like a imx185 sensor. i imitate the dirver form the lt6911 hdmi2csi bridge dirver which provided from the official source code. Sadlly, by using the tegracam_device , a lot of v4l2 opration to set up or config the tc358743 is missing, the ops that i can define is adjust gain/ expo is control for a cmos sensor. where should i define other v4l2 ops such as .s_dv_timings .s_stream .set_edid …

do nvidia have a functional example for those ops?

7

You can reference to nv_imx185 for those OPS and point to dummy function if don’t have gain/exposure control for the chip.

Thanks

8

ok, i do reference the nv_imx185 dirver, and point to the dummy function for gain/exposure control, i want to add .s_dv_timings .s_stream .set_edid etc ops for the v4l2_subdev, but the tegra camera v4l2_subdev don’t have these ops. those are define in the tegracam_v4l2.c

static struct v4l2_subdev_video_ops v4l2sd_video_ops = {
	.s_stream	= v4l2sd_stream,
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
	.g_mbus_config	= camera_common_g_mbus_config,
#endif
	.g_input_status = v4l2sd_g_input_status,
};

static struct v4l2_subdev_core_ops v4l2sd_core_ops = {
	.s_power	= camera_common_s_power,
};

the original v4l2_subdev_ops are defined like this

static const struct v4l2_subdev_core_ops tc358743_core_ops = {
	.log_status = tc358743_log_status,
#ifdef CONFIG_VIDEO_ADV_DEBUG
	.g_register = tc358743_g_register,
	.s_register = tc358743_s_register,
#endif
	.interrupt_service_routine = tc358743_isr,
	.subscribe_event = tc358743_subscribe_event,
	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
};

static const struct v4l2_subdev_video_ops tc358743_video_ops = {
	.g_input_status = tc358743_g_input_status,
	.s_dv_timings = tc358743_s_dv_timings,
	.g_dv_timings = tc358743_g_dv_timings,
	.query_dv_timings = tc358743_query_dv_timings,
	.s_stream = tc358743_s_stream,
};

static const struct v4l2_subdev_pad_ops tc358743_pad_ops = {
	.enum_mbus_code = tc358743_enum_mbus_code,
	.set_fmt = tc358743_set_fmt,
	.get_fmt = tc358743_get_fmt,
	.get_edid = tc358743_g_edid,
	.set_edid = tc358743_s_edid,
	.enum_dv_timings = tc358743_enum_dv_timings,
	.dv_timings_cap = tc358743_dv_timings_cap,
	.get_mbus_config = tc358743_get_mbus_config,
};

so the tegra camera framework for v4l2 dont suport those ops? should i use a custom structure other than the tegra camera framework?

9

For that you can reference to tc358840 looks like that doesn’t using tegracam framework.

10

Hi, I still can’t recv csi singal from vi ,is there any way to verify the csi recv state？

BTW after the driver initilazation the media Device topology looks like below, is it correct? i saw the offical imx185 sensor device topology only have one v4l-subdev : /dev/v4l-subdev0 like the second output.

> media-ctl -p -d /dev/media0
> Media controller API version 5.10.120
> 
> Media device information
> ------------------------
> driver          tegra-camrtc-ca
> model           NVIDIA Tegra Video Input Device
> serial
> bus info
> hw revision     0x3
> driver version  5.10.120
> 
> Device topology
> - entity 1: 13e40000.host1x:nvcsi@15a00000- (2 pads, 2 links)
>             type V4L2 subdev subtype Unknown flags 0
>             device node name /dev/v4l-subdev0
>         pad0: Sink
>                 <- "tc358743 10-000f":0 [ENABLED]
>         pad1: Source
>                 -> "vi-output, tc358743 10-000f":0 [ENABLED]
> 
> - entity 4: tc358743 10-000f (1 pad, 1 link)
>             type V4L2 subdev subtype Unknown flags 0
>             device node name /dev/v4l-subdev1
>         pad0: Source
>                 [fmt:UYVY8_1X16/1920x1080 field:none colorspace:smpte170m]
>                 [dv.caps:BT.656/1120 min:640x350@13000000 max:1920x1200@165000000 stds:CEA-861,DMT,CVT,GTF caps:progressive,reduced-blanking,custom]
>                 [dv.detect:BT.656/1120 1024x768p60 (1344x806) stds: flags:]
>                 [dv.current:BT.656/1120 1920x1080p30 (2200x1125) stds:CEA-861 flags:can-reduce-fps,CE-video,has-cea861-vic]
>                 -> "13e40000.host1x:nvcsi@15a00000-":0 [ENABLED]
> 
> - entity 6: vi-output, tc358743 10-000f (1 pad, 1 link)
>             type Node subtype V4L flags 0
>             device node name /dev/video0
>         pad0: Sink
>                 <- "13e40000.host1x:nvcsi@15a00000-":1 [ENABLED]

Media controller API version 0.1.0

Media device information
------------------------
driver          tegra-vi4
model           NVIDIA Tegra Video Input Device
serial
bus info
hw revision     0x3
driver version  0.0.0

Device topology
- entity 1: 15a00000.nvcsi--1 (2 pads, 2 links)
            type V4L2 subdev subtype Unknown flags 0
            device node name /dev/v4l-subdev0
      pad0: Sink
            <- "imx185 30-001a":0 [ENABLED]
      pad1: Source
            -> "vi-output, imx185 30-001a":0 [ENABLED]

- entity 4: imx185 30-001a (1 pad, 1 link)
            type V4L2 subdev subtype Sensor flags 0
      pad0: Source
            -> "15a00000.nvcsi--1":0 [ENABLED]

- entity 6: vi-output, imx185 30-001a (1 pad, 1 link)
            type Node subtype V4L flags 0
      pad0: Sink
            <- "15A00000.nvcsi--1":1 [ENABLED]

Thanks a lot!

11

Check the trace log.

https://elinux.org/Jetson/l4t/Camera_BringUp

12

hi, i saw csi2_fops,csi4_fops for the csi part in the tegra souce code and csi5_fops for the nvcsi part. i was confused by these ops. i do add some debug mesg in the source file and rebuild the kernel. i found out only the csi5_fops was used. where can i find some doc about these api. i already read the TRM and the CAM Dev part of the jetson linux dev doc. i didn’t find any resource about the source file arrch.

Thanks a lot!

13

Orin is vi5/csi5
Sorry there’s no document for it.

14

my problem was solved， Thanks a lot!
here is my selution:

  1. i quoted the refclk releated part in tc358743.c ,cause my capture booard has an ext clk ,which dosen’t need the orin nx to output a clk. BTW the jetson can output 24M clk max , it’s not enough for the tc358743 which need at least a 26M clk. i manully set the refclk_hz at 27M . which can also botain from the dt file if it is set.

  2. I chang the csi5_fops.c to add a mipi_clock_rate_hz param after the lane_polarity pram in the csi5_stream_set_config function. and cil_config.mipi_clock_rate = mipi_clock_rate / 1000; so the csi cil_cil_config get the right mipi_clock_rate ;

my dt was modify from the tc358840 dt file where can be found in the path
/Linux_for_Tegra/source/public/hardware/nvidia/platform/t19x/common/kernel-dts/t19x-common-modules/tegra194-camera-imx274-hdmi.dtsi

the cil_settletime,lane_polarity should also be added to the CSI_CHAN part of dt file. so the csi5_fops can get these param from the dt node. other than the s_data(which means the camera_common_data struct, in that you have to use the tegra camera platform structure and change the driver and the dt file a lot like a cam)

16

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