Jetson Orin Nano DevKit SPI speed

[kodytota]

Hello,
I would like to ask about the clock speed control of the SPI CLK. On Orin Nano DevKit i configured SPI, and it works fine, but speed cannot be decreased under ~3MHz. I found out discussion about this topic here:
Jetson orin nano SPI Speed not changing, where you mentioned " Yes, there’s a function -set_best_clk_source() has been removed in JP6".
And i would like to ask, if there are any updates to this, or any fix to this. What i need to achieve is SPI with speed of max 1MHz, whihc is maximal speed of gyroscope I need to connect.
Thank you in advance

[KevinFFF]

Hi kodytota,

What’s the Jetpack version in use?

Have you tried to measure the current SPI frequency you got?

Please try to configure spi-max-frequency property in device tree to check if it could help.

[kodytota]

Hi KevinFFF,
its version R36, rev 4.3 with jetpack 6.2.
I tried to measure actual frequency using logic analyzer and it was ~3MHz, even when i set it to 1MHz.
After boot, parent clock is set to pllp_out0, which i read in other forum cannot be lowered under 3.2 Mhz, however i was able to change it even lower, when i ran:

echo clk_m > /sys/kernel/debug/bpmp/debug/clk/spi1/parent

[KevinFFF]

Hi kodytota,

@kodytota

however i was able to change it even lower, when i ran:

Please try to configure the following line in device tree to check if it could help.

		spi@3210000 {
			compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
			reg = <0x0 0x03210000 0x0 0x1000>;
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			clocks = <&bpmp TEGRA234_CLK_SPI1>;
			assigned-clocks = <&bpmp TEGRA234_CLK_SPI1>;
-			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+			assigned-clock-parents = <&bpmp TEGRA234_CLK_CLK_M>,
			clock-names = "spi";
			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
			resets = <&bpmp TEGRA234_RESET_SPI1>;
			..