Jetson Xavier AGX power subsystem

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
1

Hello,

I was checking the hardware architecture of the Jetson AGX Xavier, and I have found that it is equipped with a power subsystem and inside the SoC is equipped with a BPMP(Boot and Power Management Processor).

In the SoC datasheet it is written that

The Boot and Power Management Processor (BPMP) complex provides a set of hardware functions that support the following tasks:
Boot

  • Cold boot
  • Warm boot
  • Deep-sleep (SC7) entry and exit

Power Management

  • DVFS and clock/voltage management
  • SoC power state management
  • Core rail power management (i.e., VDD_CPU, VDD_CORE, VDD_CV, VDD_SOC)
  • Process, Voltage, and Temperature Sensor management

TECHNICAL REFERENCE MANUAL NVIDIA Xavier Series System-on-Chip (page 438)

And for the power subsystem I have attached a picture of it inside this document Jetson AGX Xavier Series Product Design Guide:
image

What is the difference between the two? Does the BPMP only control the power of SoC component or the others (DRAM, peripherals…). How does the BPMP interact with the power subsystem? And how do they complement each other?

Thank you.

3

Hi, BPMP is to control SoC rails directly and also others thru PMIC. Such module inside info are not public. If you met any specific issue, please share here.

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