hi nvidia:
我对ttyAMA10做回环测试，发现当我发送超过7个字符时就会报错，比如我发送 字符串 1234567 不会报错，但是当我发送12345678时就会报错， 串口配置如下
uart10: serial@810c540000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x81 0x0c540000 0x0 0x10000>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA264_CLK_UART10>,
<&bpmp TEGRA264_CLK_PLLP_OUT0>;
clock-names = "uartclk", "apb_pclk";
assigned-clocks = <&bpmp TEGRA264_CLK_UART10>;
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
dmas = <&gpcdma 12 12 TEGRA_SID_GPCDMA>,
<&gpcdma 12 22 TEGRA_SID_GPCDMA>;
dma-names = "rx", "tx";
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_UART10>;
dma-coherent;
arm,primecell-periphid = <0x00051011>;
resets = <&bpmp TEGRA264_RESET_UART10>;
reset-names = "serial";
status = "disabled";
};
错误信息
[ 48.394330] [TS:58296278136] uart-pl011 810c540000.serial: DMA channel TX dma0chan21@0x0000000000000000 : Read response with poison bit error status:0@0x0000fffffffff000 : EMEM address decode error (EMEM decode error)
[ 100.047107] [TS:109949055191] pegasus_cdi_event event:13 data:0 ts:0 start hrtimer 100ms later
[ 100.047114] [TS:109949061543] pegasus_cdi_event event:13 data:1 ts:0 set_camera_triger_cmd
[ 100.047116] [TS:109949064080] pegasus_cdi_monitor kfifo_out event:20 data:1e ts:99068539907@0x0000fffffffff000 : EMEM address decode error (EMEM decode error)@0x0000000000000000 : Read response with poison bit error status:0@0x0000000000000000 : Read response with poison bit error status:0@0x0000fffffffff000 : EMEM address decode error (EMEM decode error)@0x0000fffffffff000 : EMEM address decode error (EMEM decode error)@0x0000000000000000 : Read response with poison bit error status:0@0x0000fffffffff000 : EMEM address decode error (EMEM decode error)@0x0000000000000000 : Read response with poison bit error status:0
Hi helianyi1,
Could you update the following lines in device tree to check if it could help for your case?
- dmas = <&gpcdma 12 12 TEGRA_SID_GPCDMA>,
- <&gpcdma 12 22 TEGRA_SID_GPCDMA>;
+ dmas = <&gpcdma 12 12 TEGRA264_GPCDMA_SID_UART10>,
+ <&gpcdma 12 22 TEGRA264_GPCDMA_SID_UART10>;
dma-names = "rx", "tx";
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_UART10>;
ok , the patch fix this issue
SamM11
July 29, 2026, 8:57am
5
Hi @KevinFFF ,
I faced the same issue here at JP7.2 , but I use uart5: serial@810c510000(ttyAMA5) and uart9: serial@810c530000(ttyAMA9). and I using the custom board.
In JetPack 7.1, I only needed to change the status property of UART5 and UART9 to "okay" in tegra264.dtsi, and both UARTs worked correctly.
However, in JetPack 7.2, applying the same modification only enables UART5 to function properly, while UART9 still does not work.
I then applied the patch you provided to UART9 , but it still does not function correctly.
Below are dmesg about tty:
sudo dmesg | grep tty
[ 0.000000] Kernel command line: root=PARTUUID=46ceeaef-cd2f-4fd7-9bfd-48585f7e5b10 rw rootwait rootfstype=ext4 mminit_loglevel=4 earlycon=tegra_utc,mmio32,0xc5a0000 console=ttyUTC0,115200 clk_ignore_unused firmware_class.path=/etc/firmware fbcon=map:0 efi=runtime audit_backlog_limit=8192 video=efifb:off console=tty0 bl_prof_dataptr=6225920@0x2004010000 bl_prof_ro_ptr=65536@0x2004000000
[ 0.012575] printk: legacy console [tty0] enabled
[ 0.113166] printk: legacy console [ttyUTC0] enabled
[ 5.185317] 810c510000.serial: ttyAMA5 at MMIO 0x810c510000 (irq = 124, base_baud = 0) is a PL011 rev0
[ 5.186988] 810c530000.serial: ttyAMA9 at MMIO 0x810c530000 (irq = 125, base_baud = 0) is a PL011 rev0
[ 5.193654] 810c540000.serial: ttyAMA10 at MMIO 0x810c540000 (irq = 126, base_baud = 0) is a PL011 rev0
[ 8.819737] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
[ 8.870888] systemd[1]: Expecting device dev-ttyGS0.device - /dev/ttyGS0...
[ 8.877859] systemd[1]: Expecting device dev-ttyUTC0.device - /dev/ttyUTC0...
Thanks!!
Please share the full dmesg and device tree in your case for further check.
For UART9, you need to update the following lines:
- dmas = <&gpcdma 10 10 TEGRA_SID_GPCDMA>,
- <&gpcdma 10 20 TEGRA_SID_GPCDMA>;
+ dmas = <&gpcdma 10 10 TEGRA264_GPCDMA_SID_UART9>,
+ <&gpcdma 10 20 TEGRA264_GPCDMA_SID_UART9>;
dma-names = "rx", "tx";
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_UART9>;
SamM11
July 30, 2026, 5:38am
8
Hi @KevinFFF ,
below are my dtsi setting:
tegra264.dtsi
uart5: serial@810c510000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x81 0x0c510000 0x0 0x10000>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA264_CLK_UART5>,
<&bpmp TEGRA264_CLK_PLLP_OUT0>;
clock-names = "uartclk", "apb_pclk";
assigned-clocks = <&bpmp TEGRA264_CLK_UART5>;
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
dmas = <&gpcdma 11 11 TEGRA264_GPCDMA_SID_UART5>,
<&gpcdma 11 21 TEGRA264_GPCDMA_SID_UART5>;
dma-names = "rx", "tx";
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_UART5>;
dma-coherent;
arm,primecell-periphid = <0x00051011>;
resets = <&bpmp TEGRA264_RESET_UART5>;
reset-names = "serial";
status = "disabled";
};
uart9: serial@810c530000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x81 0x0c530000 0x0 0x10000>;
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA264_CLK_UART9>,
<&bpmp TEGRA264_CLK_PLLP_OUT0>;
clock-names = "uartclk", "apb_pclk";
assigned-clocks = <&bpmp TEGRA264_CLK_UART9>;
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
dmas = <&gpcdma 10 10 TEGRA264_GPCDMA_SID_UART9>,
<&gpcdma 10 20 TEGRA264_GPCDMA_SID_UART9>;
dma-names = "rx", "tx";
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_UART9>;
dma-coherent;
arm,primecell-periphid = <0x00051011>;
resets = <&bpmp TEGRA264_RESET_UART9>;
reset-names = "serial";
status = "disabled";
};
dmesg.txt (130.1 KB)
Thanks!!
Your device tree configurations for UART5/UART9 look good to me.
[ 142.613801] uart-pl011 810c530000.serial: DMA channel TX dma0chan19
[ 142.613831] uart-pl011 810c530000.serial: DMA channel RX dma0chan9
[ 171.366592] uart-pl011 810c510000.serial: DMA channel TX dma0chan20
[ 171.366625] uart-pl011 810c510000.serial: DMA channel RX dma0chan10
Do you run any command so that it prints above messages?
Could you verify UART loopback test before connecting with other UART device?
SamM11
July 31, 2026, 5:27am
11
Hi @KevinFFF ,
I used a UART loopback tool for testing, and the message appeared when I used PuTTY.
Thanks!!
Do you mean the issue is specific to the serial application you are using?
SamM11
August 6, 2026, 5:35am
14
Hi @KevinFFF ,
Sorry, I may not have explained the issue clearly. Let me describe the situation again.
I am currently using a custom carrier board with JetPack 7.2 . I found that UART5 (serial@810c510000, ttyAMA5) and UART9 (serial@810c530000, ttyAMA9) cannot be used properly.
My test method is as follows:
I connect UART5 to a UART loopback fixture.
I use PuTTY to perform a loopback test.
The characters I type on the keyboard should be echoed back and displayed in the PuTTY terminal.
After testing UART5, I repeat exactly the same procedure with UART9 .
With this test method, both UART5 and UART9 work correctly on JetPack 7.1 , and the characters I type are echoed back as expected.
However, on JetPack 7.2, neither UART works correctly by default .
then I found this discussion and applied the modification you previously suggested. After applying the patch, UART5 works correctly , but UART9 still does not function .
The following dmesg messages appear when I connect to the UART using PuTTY:
[ 142.613801] uart-pl011 810c530000.serial: DMA channel TX dma0chan19
[ 142.613831] uart-pl011 810c530000.serial: DMA channel RX dma0chan9
[ 171.366592] uart-pl011 810c510000.serial: DMA channel TX dma0chan20
[ 171.366625] uart-pl011 810c510000.serial: DMA channel RX dma0chan10
Could you let me know whether these dmesg messages are expected, or if they indicate any issue with the UART or DMA configuration on JetPack 7.2?
Thanks!!
SamM11:
With this test method, both UART5 and UART9 work correctly on JetPack 7.1 , and the characters I type are echoed back as expected.
However, on JetPack 7.2, neither UART works correctly by default .
As there’s no issue with JP7.1, could you share the full device tree and dmesg for both releases?
SamM11
August 7, 2026, 9:34am
16
The uart-pl011 … DMA channel TX/RX … messages are expected and only indicate that the UART driver successfully allocated DMA channels, so they do not by themselves imply a UART or DMA failure.
uart9: serial@810c530000 {
dmas = <&gpcdma 10 10 TEGRA264_GPCDMA_SID_UART9>,
<&gpcdma 10 20 TEGRA264_GPCDMA_SID_UART9>;
dma-names = "rx", "tx";
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_UART9>;
};
SamM11
August 13, 2026, 1:48am
18
Hi @KevinFFF ,
Thanks for reply,
Sorry, I realized that the UART 9 device tree configuration in the tegra264.dtsi_jp72.txt file I uploaded previously was incorrect. The actual image I flashed was indeed modified according to your suggested approach, but UART 9 is still not functioning properly.
I also provided the device tree that I modified for JP7.2 earlier in this discussion.
Hi @KevinFFF ,
below are my dtsi setting:
tegra264.dtsi
uart5: serial@810c510000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x81 0x0c510000 0x0 0x10000>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA264_CLK_UART5>,
<&bpmp TEGRA264_CLK_PLLP_OUT0>;
clock-names = "uartclk", "apb_pclk";
assigned-clocks = <&bpmp TEGRA264_CLK_UART5>;
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
dmas = <&gpcdma 11 11 TEGRA264_GPCDMA_SID_UART5>,…
And I found a discussion where someone face the same issue with the UART 9 loopback test.Link ]
Thanks!!
Hi SamM11,
Could you create a new topic or move to another thread as the current one is specific to UART10(/dev/ttyAMA10)?