Kernel panic when trying to set imx219 in RAW8

We want to validate CSI RAW8 camera setting, and use Pi Camera imx219 as source.
But I can’t get frame data with my modifications to sensor setting and pixel format for Tegra.
Need your advise to set RAW8 to work. Thanks.

Here are my modifications:

+++ b/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-camera-rbpcv2-imx219.dtsi
@@ -823,7 +823,7 @@
                */
                num_csi_lanes = <4>;
                max_lane_speed = <1500000>;
-               min_bits_per_pixel = <10>;
+               min_bits_per_pixel = <8>;

kernel/nvidia/drivers/media/i2c/imx219_mode_tbls.h
@@ -189,8 +189,8 @@ static imx219_reg imx219_mode_1920x1080_30fps[] = {

-       {0x018C, 0x0A},
-       {0x018D, 0x0A},
+       {0x018C, 0x08},
+       {0x018D, 0x08},
        /* clocks dividers */
-       {0x0309, 0x0A},
+       {0x0309, 0x08},

kernel/nvidia/drivers/media/platform/tegra/camera/sensor_common.c
@@ -197,7 +197,9 @@ static int extract_pixel_format(
 {
        size_t size = strnlen(pixel_t, OF_MAX_STR_LEN);
 
-       if (strncmp(pixel_t, "bayer_bggr10", size) == 0)
+       if (strncmp(pixel_t, "bayer_rggb", size) == 0)
+               *format = V4L2_PIX_FMT_SRGGB8;
+       else if (strncmp(pixel_t, "bayer_bggr10", size) == 0)
                *format = V4L2_PIX_FMT_SBGGR10;

I can see RAW8 in v4l2 info:

Driver Info (not using libv4l2):
	Driver name   : tegra-video
	Card type     : vi-output, imx219 9-0010
	Bus info      : platform:15c10000.vi:0
	Driver version: 4.9.201
	Capabilities  : 0x84200001
		Video Capture
		Streaming
		Extended Pix Format
		Device Capabilities
	Device Caps   : 0x04200001
		Video Capture
		Streaming
		Extended Pix Format
Priority: 2
Video input : 0 (Camera 0: ok)
Format Video Capture:
	Width/Height      : 3264/2464
	Pixel Format      : 'RGGB'
	Field             : None
	Bytes per Line    : 3264
	Size Image        : 8042496
	Colorspace        : sRGB
	Transfer Function : Default (maps to sRGB)
	YCbCr/HSV Encoding: Default (maps to ITU-R 601)
	Quantization      : Default (maps to Full Range)
	Flags             : 

I use below CMD to capture frame data:

v4l2-ctl -d /dev/video0 --set-fmt-video=width=3264,height=2464,pixelformat=RGGB --stream-mmap --stream-count=30

It will cause kernel panic:
panic_on_imx219_raw8.txt (20.2 KB)

If I set embedded_metadata_height = “0”, it won’t cause panic, but I still can’t get frame data with endless “discarding frame” messages.

I think you need to consult with Sony to get the REG setting for the RAW8 output.

Hi Shane,

According to sensor Spec. and respberry pi usage, change Data Type and Clock setting should be able to change RAW10/RAW8.

static const struct imx219_reg raw8_framefmt_regs[] = {
	{0x018c, 0x08},
	{0x018d, 0x08},
	{0x0309, 0x08},
};

static const struct imx219_reg raw10_framefmt_regs[] = {
	{0x018c, 0x0a},
	{0x018d, 0x0a},
	{0x0309, 0x0a},
};

May I know why you think my problem is sensor setting related? Thanks.

From the log looks like NVCSI/VI didn’t receive validate data from sensor then case the panic.
Have a check the trace log to check if can get more information.

Hi Shane,

Here is the trace log & dmesg:

log.zip (911.5 KB)

Thanks for your help.

The log tell the FIFO full and crc error in pd. Have a check the TRM for the REG NVCSI_STREAM_0_INTR_STATUS_VC0_0 and NVCSI_PHY_0_CILA_INTR_0_STATUS_CILA_0

     kworker/2:3-2083  [002] ....    84.286354: rtcpu_nvcsi_intr: tstamp:3014424409 class:GLOBAL type:PHY_INTR0 phy:0 cil:0 st:0 vc:0 status:0x00000110
     kworker/2:3-2083  [002] ....    84.286354: rtcpu_nvcsi_intr: tstamp:3014424409 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:0 vc:0 status:0x00000004

Hi Shane,

I just applied the identical RAW8 settings on nano, it works.
Could Nvidia check why AGX/NX doesn’t work with RAW8?
Or, could you provide some success example with RAW8?
Thanks.

@colaml
We have partner have successfully get raw8 sensor AR0234 working with v4l2-ctl

Hi Shane,
we need to enable raw8 on NX.
Could you advise how to overcome this problem we met.

Have a try the patch from below link for crc/ecc log. Also boost the nvcsi/vi clocks to check the FIFO error.

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