[L4T 35.3.1] "Error connecting DP: cannot read IDR" when trying to flash external MCU via "openocd"

[kevin.choi]

Hi,

We are trying to use the Orin Nano to flash an external MCU using OpenOCD v12.
For our prototype, we’re connecting a SparkFun SAMD21 Dev Breakout Board (https://www.sparkfun.com/products/13672) to the Orin Nano. So we want to use “openocd” installed on the Orin Nano to flash the SAMD21G18A MCU that is on the Breakout Board.

We want to reserve 3 GPIO pins on the Orin Nano:

1. SWC / PAA.03 / pin 37 on the 40-pin header
2. SWD / PAA.02 / pin 33 on the 40-pin header
3. RSTn / PAA.01 / pin 29 on the 40-pin header

Here are the steps I took to get where I am now:

1. sudo apt-get install make libtool pkg-config autoconf automake texinfo libusb-1.0 gpiod libgpiod-dev
2. sudo git clone http://openocd.zylin.com/openocd
3. cd openocd
4. ./bootstrap
5. ./configure --enable-dln-2-gpiod --enable-linuxgpiod
6. make
7. make install
8. Open “/usr/local/share/openocd/scripts/interface/dln-2-gpiod.cfg” and change it accordingly:

# SPDX-License-Identifier: GPL-2.0-or-later

# Use DLN-2 GPIO through linuxgpiod
#
# +-----------+-------------+-------------+
# | signal    | DLN-2       | gpio offset |
# +-----------+-------------+-------------+
# | SWCLK     | PAA.03      | 3           |
# | SWDIO     | PAA.02      | 2           |
# | RSTn      | PAA.01      | 1           |
# +-----------+-------------+-------------+

adapter driver linuxgpiod

adapter gpio swclk 3 -chip 0
adapter gpio swdio 2 -chip 0
adapter gpio srst 1 -chip 0

reset_config trst_and_srst separate srst_push_pull

9. Connect SWCLK on the MCU breakout board to pin 37 on the J50 header.
10. Connect SWDIO on the MCU breakout board to pin 33 on the J50 header.
11. Connect RESETn on the MCU breakout board to pin 29 on the J50 header.
12. Connect 3.3V on the MCU breakout board to pin 1 on the J50 header.
13. Connect GND on the MCU breakout board to pin 39 on the J50 header.

14. cd /home/openocd
15. touch openocd.cfg
16. Edit “openocd.cfg” accordingly:

--------------------------------------------------------
adapter driver linuxgpiod
transport select swd

# Chip info
set CHIPNAME at91samd21g18a
set ENDIAN little
source [find interface/dln-2-gpiod.cfg]
source [find target/at91samdXX.cfg]

# Commands
init
targets
reset halt
shutdown
--------------------------------------------------------

17. Run “openocd”.

After finally running all these commands, I get a generic error saying "Error connecting DP: cannot read IDR" (please see example picture below).

I understand this is a generic error, but can you please help me debug this issue? Have you had success with running “openocd” on the Orin Nano specifically?

Is there something we have to do to reserve the GPIO pins before running OpenOCD, for example?

[KevinFFF]

Hi kevin.choi,

Are you using the devkit or custom board for Orin Nano?

@kevin.choi

We want to reserve 3 GPIO pins on the Orin Nano:

How do you configure these 3 pins as SWC/SWD/RSTn?
Could you help to provide the current pinmux spreadsheet in use?
It seems the default PAA.01, PAA.02, PAA.03 are used for CAN bus.

@kevin.choi

Have you had success with running “openocd” on the Orin Nano specifically?

Sorry, we don’t verify OpenOCD for this kind of devices on Jetson device.

[kevin.choi]

1. We have the file dln-2-gpiod.cfg that sets up these pins accordingly. Other than that, we have not done anything else. I am not familiar with linuxgpiod so I do not know if we need to run something like echo i > /sys/class/gpio/export for sysfsgpio.
2. We have not used any custom pinmux. We are using the “stock” settings provided in the BSP v35.3.1.

[KevinFFF]

@kevin.choi

dln-2-gpiod.cfg

Where did you get this configuration file?

@kevin.choi

echo i > /sys/class/gpio/export

sysfs is used for control I/O high/low, seems not for your case.

[kevin.choi]

1. When you run make install, the system will create the file dln-2-gpiod.cfg in /usr/local/share/openocd/scripts/interface/.
2. Yes, I understand that’s for “sysfs”, but is there something equivalent I have to do for the “linuxgpiod” driver?

[KevinFFF]

Sorry, what is linuxgpiod driver? Dose that mean Linux GPIO driver?

@kevin.choi

We have the file dln-2-gpiod.cfg that sets up these pins accordingly.

Do you know how it configure these 3 pins?

[kevin.choi]

Hi,

I am not sure how it configures these 3 pins. We would need to look at low-level code for “openocd” itself.

[KevinFFF]

Sorry, we don’t have experience to use OpenOCDor related SWDIO interface on Jetson device.
We could support how to configure it as GPIO correctly, but we don’t know the driver for OpenOCD. Maybe you could verify them on the Ubuntu host PC first. If that works fine on the Ubuntu hostPC, then you could port them to the Jetson device.