I’m trying to to connect agx orin endpoint with agx orin root port with pcie cable as per endpoint design guide & Orin design guide etc, without success yet.
First at root port side, root port controller C5 not show by lspci
lspci
0001:00:00.0 PCI bridge: NVIDIA Corporation Device 229e (rev a1)
0001:01:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8822CE 802.11ac PCIe Wireless Network Adapter
In dmesg:
[ 11.180380] tegra194-pcie 141a0000.pcie: Phy link never came up
[ 11.187668] tegra194-pcie 141a0000.pcie: PCI host bridge to bus 0005:00
Is this normal? I think C5 up is the basic requirement.
I noticed in other post, lspci will show c5 by xavier dk.
Would you be kind to share you lspci result of jetson agx orin (root port side), before and after root port orin connected with endpoint orin?
Thanks for your quick reply. Is the following expectation / desc correct?
1, I have a new agx orin (by default its C5 is RP).
Before neither other PCIe device nor EP orin connected to it,
I can only see domain 1 (PCI bridge) by lspci;
and the “Phy link never came up” dmesg can be ignored.
2, After another agx orin, whose C5 changed into EP mode, connected to RP with a special PCIe cable.
I can see domain 1 (PCI bridge) and
domain 5 (PCI bridge) together with ( RAM memory or virtual Ethernet )
by lspci;
and in dmesg C5 link up.
At present, I have no such special PCIe cable to finish the connection.
If the above statement is correct, it’s okay if I don’t care about dmesg msg.
You can connect other PCIe device to your RP side first to validate whether your RP can really detect PCIe device first.
I have no device listed in Jetson_AGX_Orin_SCL_20220316.pdf.
I connect some Ascend card to RP, but failed to enumerate.
I have to use some COMMON card?
An NVMe hard drive was inserted into C4, and the domain bridge and the hard drive device came up together.
// in dmesg Phy link never came up → Link up
This behavior is caused by device tree.
nvidia,disable-power-down: Set this property to keep root port enabled even if no Endpoint is connected to the root port
I’m currently having to use an ADT-Link (K3S) PCIe crossover cable, which is not directly a appropriate cable. After the following changes to the EP end, is it a appropriate cable to connect two orin’s C5 PCIe slots?
cable B1-B3, B10, A2-A3 contacts are covered with adhesive strips;
Just a clarification. I am no hardware guy. If you want to check your hardware, I can find someone else to help.
Currently I only want to check the software part.
If the ODMDATA is set correctly and if you are on rel-35.4.1, then you don’t need to change anything in device tree. Unless your hardware design does not meet our expectation.