Hi I am trying to get my xavier nx to communicate in a slave orientation over SPI0. I am looking for what specifically to change in the .dts file to make this change take affect. I have referenced some forums but it is not clear what specifically makes happen as the .dts all look different.
Hi tmyers,
Are you using the Xavier NX or Jetson Nano?
Devkit or custom board?
What’s your Jetpack in use?
I am using an Xavier NX with Connect tech quark carrier board and Jetpack 4.4. It occurs to me now that you ask that the .dtb/.dts could look different because of the carrier board company.
I would think it would still be somewhat clear as to setting a particular register a certain way, or something like that. I could be over-simplifying it though.
Will changing the first line from nvidia,tegra186-spi to nvidia,tegra186-spi-slave make the change for me?
Yes, you could refer to the following thread to configure SPI slave from device tree.
SPI0 interface configured as a slave in Jetson Xavier NX - #10 by borjabasket14
That was the topic I was trying to follow as it seems the one with the most success. I changed the device tree accordingly but the jetson-io.py script is not working for me. Is the configuration of the pinmux needed? If so is there a way to do it without using the jetson-io.py? It seems all of my production xaviers on these carrier boards, the jetson-io.py, does not work. When I try it on my development xavier it works. Moreover, I know the SPI is active on these production xaviers because it is working in the master SPI orientation currently. Unless there is some slave assignment there also, I am unsure what I am missing.
I have also been using this forum for reference also. How to set to spi slave mode - #3 by ShaneCCC
I am open to other suggestions to try because I am at a loss.
Let me move your topic from Jetson Nano to Xavier NX category.
Jetson-IO could only be used for the devkit from NVIDIA because there might be different custom design and pin define. You could modify the pinmux through pinmux spreadsheet or the pinmux dts directly.
If your SPI master mode could work as expected, your pinmux should be configured correctly. You just need to modify the device tree as that link suggested for SPI slave.
Your comment about Jetson-io makes sense. I never thought about it that way. Good information to know. I am pretty positive the SPI is active and that my problem is with the device tree. I can see my messages transfer accordingly on my oscilloscope when I run a SPI test. At this point, I have two xaviers set up one I am trying to change to a slave and one acting as a master. Unfortunately, I can see the slave still outputting a clock.
All that being said, do you have any resources for the pixmux spreadsheet or how to directly change the pinmux dts? I think this would be good to know either way since the Jetson-io doesn’t work. Is it a similar procedure of decompiling a dtb to get the dts?
Is it possible that the carrier board company has a different configuration/driver for this SPI slave? I will reach out to them as well to see if they know anything on this front. Is there a place where all of these drivers are listed that I can reference?
Is the pinning of that interface somehow different in your custom board other than the devkit board?
How I managed it was basically comparing the changes that the jetson-io made and then including that into the device tree, as the pinning in my case was the same.
Hi @borjabasket14,
Yes, the pin out is different:
NVidia dev: MOSI (pin19), MISO (pin 21), clk (pin 23)
Quark carrier brd: MOSI (pin 20), MISO (pin 18) and clk (pin 16)
Unfortunately, the jetson-io interface doesnt work on these boards so I am unsure how to trace these pins. There was only two active SPIs with one being a qSPI clearly writting to flash memory so I figured the first active SPI is the one I need.
As you could run the SPI test with master successfully, it seems your pinmux for SPI has been configured correctly.
Because the custom board is not designed by you, it seems you don’t need to configure the pinmux.
You might just need to configure spi node in device tree for slave.
Could you share the dtb file in use for further check?
tegra194-xavier-nx-cti-NGX004.dtb (172.6 KB)
This is the file I have been working with. I found this by going to where the carrier board company flashes their board configurations and in that file I found it sourcing this dtb.
spi@3210000 {
compatible = "nvidia,tegra186-spi-slave";
It seems you’ve configure slave for spi@3210000.
Do you know which SPI interface you are using?
Could you share the dmesg for further check?
and also the result of the following command.
$ sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi
I saw that there was only two active spi in the dtb. One being the qspi tied to flash to I thought that it must be the other spi but I admit that was an assumption. Also, the carrier board only has one spi broken out to the gpio header. I attached what you asked for.
dmesg.txt (58.3 KB)