I would like to know if there is any way to increase the MDIO clock for the MGBE interface of the Jetson AGX Orin? We have a custom carrier board, with a different 10G PHY from the dev kit. We currently don’t have an EEPROM connected to the PHY for storing the firmware, so we need to load the firmware at every boot through the PHY driver. It is taking about 20 seconds to load the firmware at the current MDIO speed. Since the PHY supports MDIO clocks of up to 25 MHz, I was wondering if there is any way for us to achieve that. I saw that on the MAC driver, there seems to be calls for setting the MDC clk rate, but it is not clear to me what parameter I should set to achieve the 25 MHz.
Not sure about the query. Please share the deviation between AGX Orin developer kit and your hardware design. Looks like you don’t use PHY in Orin module. Do you connect your PHY to Orin through PCIe or USB?
The main difference is that we are connecting a different PHY to the Orin 10G MAC than the one used by devkit. The devkit is using the Marvell AQR113C, whereas we are using a Broadcom PHY. The PHY connects to the Orin module through the Orin UPHY_RX6/TX6 (for data) and GP86_XFI0_MDC/GP85_XFI0_MDIO (for management).
For our Broadcom PHY we need to load its firmware on every boot through the MDIO bus (GP86_XFI0_MDC/GP85_XFI0_MDIO). This process is currently taking about 20 seconds, which ends up delaying boot. We understand that one way to speed up the firmware loading is to increase the clock frequency on the MDIO bus. I read that Nvidia is currently configuring it as 2MHz, whereas our PHY supports clocks up to 25MHz. We are wondering what kind of driver changes we need to do to configure higher MDC clocks.
We don’t see similar design before. Are checking this with our team. Will update when there’s further suggestion.
We have confirmed it cannot be set to 25MHz. Per IEEE802.3, maximum frequency of MDC can be 2.5MHz and we set to 2MHz due to the clock source.