我目前使用Nvidia Orin NX 搭配JP6.2.1。
透過Pinmux.xlsm修改PI.02為Output Drive 1,開機後PI.02有成功修改成Output,但預設是LOW。
另外GPIO HIGH/LOW控制時PI.02 PIN上是有H/L變化,但是接上電路後控制GPIO H/L都沒有變化。
之前有查到JP6有GPIO的控制問題,有根據下方的補丁進行修改。
我目前使用Nvidia Orin NX 搭配JP6.2.1。
透過Pinmux.xlsm修改PI.02為Output Drive 1,開機後PI.02有成功修改成Output,但預設是LOW。
另外GPIO HIGH/LOW控制時PI.02 PIN上是有H/L變化,但是接上電路後控制GPIO H/L都沒有變化。
之前有查到JP6有GPIO的控制問題,有根據下方的補丁進行修改。
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The issue you’re describing is related to the Jetson Orin NX and Jetson AGX Orin modules, specifically with the JP621 Pinmux and the SPI1 gpio padctl register bit10. This issue may affect the control of GPIO in JP6.
The problem is caused by a bug in the pinctrl-tegra driver, which is responsible for controlling the pin multiplexing on the Jetson modules. The bug is fixed by an official patch, which is provided as a diff file.
The patch modifies the tegrapinctrl_setmux function in the drivers/pinctrl/tegra/pinctrl-tegra.c file. This function is responsible for setting the pin multiplexing configuration for a given pin group.
The patch adds a new line to the tegrapinctrl_setmux function, which sets the bit10 field of the SPI1 gpio padctl register to 1. This fixes the issue with controlling GPIO in JP6.
Here is a comparison of the affected code before and after the patch:
Before the patch:
static int tegrapinctrl_setmux(struct pinctrl_dev *pctldev,
struct pinctrl_mux *mux)
{
...
static const struct tegra_group tegra_pingroup[] = {
...
};
...
}
After the patch:
static int tegrapinctrl_setmux(struct pinctrl_dev *pctldev,
struct pinctrl_mux *mux)
{
...
static const struct tegra_group tegra_pingroup[] = {
...
};
...
/* Fix for JP621 Pinmux and SPI1 gpio padctl register bit10 */
tegra_pingroup[SPI1_GPIO_PADCTL].bit10 = 1;
...
}
The patch only affects the Jetson Orin NX and Jetson AGX Orin modules, and it is not applicable to other Jetson modules.
In terms of the impact on the system, this patch fixes an issue that may cause problems with controlling GPIO in JP6. After applying the patch, the GPIO control in JP6 should work correctly.
It’s worth noting that this patch is specific to the Jetson Orin NX and Jetson AGX Orin modules, and it may not be applicable to other systems or configurations. If you’re experiencing issues with GPIO control on a different system, you may need to investigate further to determine the root cause of the problem.
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Hi liyongru1998,
Are you using the devkit or custom board for Orin NX?
What do you mean about “接上電路後”?
Could the issue be caused by insufficient drive strength?
抱歉,這部分HW有再確認發現PR.04 pin可以動作是有接BJT,所以PI.02也會接BJT測試。
但PI.02 Output Drive 1設定後還是LOW
Do you mean the GPIO control issue of PI.02 is specific to the custom carrier board?
How do you verify that you have configured it correctly?
Have you checked the flash log to confirm the expected pinmux dtsi is in use?