jetpack6.0 两路GPIO相互干扰问题
尊敬的NVIDIA工程师帮忙看下
硬件：自制底板 + jetson orin nx
自制底板有4路DO（DO0 = PI.00、DO1 = PN.01、DO2 = PI.01、DO3 = PG.06）
开机先使用gpioset gpiochip0 51=0 或者gpioset gpiochip0 51=1操作了DO0 也就是PI.00 这个gpio后，在去使用gpioset gpiochip0 85=1 把DO1拉成高电平,DO0 = PI.00也变成高电平了，必须要把gpioset gpiochip0 85=0变低后，在使用gpioset gpiochip0 51=0，DO0 才能变成低。像是干扰到了，其他两路没有影响。若是开机先操作DO1则没有影响。
2、我尝试使用devmem工具去操作gpio高低电平一直没成功，PI.00的寄存器地址是base：0x02434000+0x90=0x02434090。 根据TRM写完，使用gpioinfo工具检查发现没反应。 就疑惑了，麻烦解答下
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Based on the provided context, I will attempt to answer your question about the Jetson Orin NX, Jetpack 6.0, GPIO, and NVIDIA.
The Jetson Orin NX is a system on module (SOM) developed by NVIDIA, which is part of the Jetson Orin series. It is designed for edge AI applications and comes with a range of features, including support for GPIO (General Purpose Input/Output) pins.
GPIO pins are used to connect external devices to the Jetson module, such as sensors, actuators, and other peripherals. The Jetson Orin NX has a total of 40 GPIO pins, which can be configured as inputs or outputs.
To access and control the GPIO pins on the Jetson Orin NX, you can use the gpioset and gpioget commands, which are part of the Jetson Linux distribution. These commands allow you to set and get the values of individual GPIO pins.
In your question, you mentioned the following GPIO pins:
These pins are part of the GPIO bank on the Jetson Orin NX, and can be accessed using the gpioset and gpioget commands.
For example, to set the value of PI00 to high, you can use the following command:
gpioset gpiochip0 510=1
Similarly, to get the value of PI01, you can use the following command:
gpioget gpiochip0 511
The gpiochip0 refers to the GPIO bank on the Jetson Orin NX, and the numbers 510 and 511 refer to the specific GPIO pins.
In addition to the gpioset and gpioget commands, you can also use the devmem command to access the GPIO pins directly. This command allows you to read and write to the GPIO registers on the Jetson Orin NX.
For example, to set the value of PI00 to high using the devmem command, you can use the following command:
devmem 0x024340000 32 0x00000001
This command writes the value 0x00000001 to the GPIO register at address 0x024340000, which sets the value of PI00 to high.
Overall, the Jetson Orin NX provides a range of features and tools for accessing and controlling GPIO pins, including the gpioset and gpioget commands, as well as the devmem command.
In comparison to other Jetson modules, such as the Jetson Orin Nano and the Jetson AGX Orin, the Jetson Orin NX has a similar GPIO architecture and can be accessed using the same commands and tools.
However, the specific GPIO pins and their functions may vary between different Jetson modules, so it’s always a good idea to consult the documentation for your specific module to ensure that you are using the correct GPIO pins and commands.
I hope this helps! Let me know if you have any further questions.
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Hi 1714557435,
It is not the expected result to me.
What device is connected to these 4 GPIOs?
To control GPIO in Jetpack 6.x, please confirm you’ve finished the following items.
GPIO/Output/Drive 0 or 1
It is the register to configure the pinmux configuration rather than the address to control the pin state.
I would like to know what the default output voltage of the PI.00 orin NX chip is?
It is configured as GPIO/Input/Pull-Down as following in pinmux spreadsheet.
This is my pinmux configuration
So, the pin state of PI.00 would be default LOW in your case.
I am currently verifying whether it is related to /kernel/kernel-jammy-src/drivers/pinctrl/tegra/pinctrl-tegra.c
Of course, I need to assume it to be at the low level.
However, I will raise the voltage by executing the command “gpioset gpiochip0 51=1”
The patch is required if you want to use the pin as Output and control it using gpioset.
Please try using the following command instead to control it high.
# gpioset --mode=wait `gpiofind "PI.00"`=1
Do you have the officially released patch file? Currently, I’m making the changes manually through this link. 40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF
As far as I know, the bug still exists by default in JP6.2. Do you have any plans to fix it?
This patch has been verified from internal team and also many forum users.
Due to some branch related issues, it does not be included in recent JP6.2 and JP6.2.1 release but it should be fixed in next official release.
I have verified that the bug in this discussion is due to the fact that pinctrl-tegra.c has not been patched. Thank you for your response.
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