I have been trying to get one of the GPIO pins from the 40 pin header on the AGX Orin to read the input as a pps device. I know the pps driver is installed because there is a native one through ktimer
, found at /dev/pps0
which responds to ppstest /dev/pps0
. I’ve been mostly having trouble with assigning the GPIO.
From what I understand, the pinmux sheet is for changing the settings of the pins, which I don’t think I need to do. Using a standard input GPIO should work, and there are plenty of those available on the 40 pin header by default.
The next step is setting up the kernel config and the device tree. After downloading the source code from Jetson Linux | NVIDIA Developer, I updated the kernel config by
-CONFIG_PPS_CLIENT_GPIO=y
+CONFIG_PPS_CLIENT_GPIO=m
This was confirmed by running zcat /proc/config.gz | less | grep PPS
after booting into the new Image
.
However, there was no /Linux_for_Tegra/sources/hardware/
folder, and the documentation only has a description for how to build the device tree blobs: Kernel Customization — NVIDIA Jetson Linux Developer Guide 1 documentation
When you build the dtbs, the hardware folder is produced, but it’s unclear where you can make edits to the device tree before turning them into blobs.
Thus I was introduced to overlays. I created a custom overlay for the 40 pin header, with the intention of turning pin 7, a.k.a. 106 from chipset0, a.k.a. PQ.06 into a pps input device:
/dts-v1/;
/plugin/;
/ {
compatible = "nvidia,p3737-0000+p3701-0005";
overlay-name = "PPS Overlay";
jetson-header-name = "Jetson 40pin Header";
fragment@0 {
target-path = "/";
__overlay__ {
pps-gpio {
status = "okay";
compatible = "pps-gpio";
gpios = <&gpio 106 1>;
};
};
};
};
Using fdtdump
to inspect the created device tree blob overlay, it looks like this:
/dts-v1/;
// magic: 0xd00dfeed
// totalsize: 0x1ea (490)
// off_dt_struct: 0x38
// off_dt_strings: 0x198
// off_mem_rsvmap: 0x28
// version: 17
// last_comp_version: 16
// boot_cpuid_phys: 0x0
// size_dt_strings: 0x52
// size_dt_struct: 0x160
/ {
compatible = "nvidia,p3737-0000+p3701-0005";
overlay-name = "PPS Overlay";
jetson-header-name = "Jetson 40pin Header";
fragment@0 {
target-path = "/";
__overlay__ {
pps-gpio {
status = "okay";
compatible = "pps-gpio";
gpios = <0xffffffff 0x0000006a 0x00000001>;
};
};
};
__fixups__ {
gpio = "/fragment@0/__overlay__/pps-gpio:gpios:0";
};
};
Looking into the device tree blob used in the boot config, I see that gpios are being registered like this:
gpios = <0x000000f1 0x00000030 0x00000001>;
gpios = <0x0000010c 0x00000024 0x00000001>;
gpios = <0x000000f1 0x00000032 0x00000001>;
Which makes me think the &gpio
being used is incorrect.
I assigned the overlay using sudo /opt/nvidia/jetson-io/jetson-io.py
, where the overlay showed up under the 40 pin header category. I confirmed the overlay is being read on boot in the /boot/extlinux/extlinux.conf
and that a folder pps-gpio
shows up in /proc/device-tree/
.
If you have any suggestions on either fixing the overlay or how to update the base device tree for use with Jetpack 6.1, please let me know.