PWM statistical values are inaccurate

[asfsdgag]

Continuing the discussion from Orin PWM output is not precise to the desired PWM in code:

hello:
I have encountered a similar problem. my kernel version is :

Linux tegra-ubuntu 5.10.120-rt70-tegra #1 SMP PREEMPT RT Fri Apr 18 16:29:22 CST 2025 aarch64 aarch64 aarch64 GNU/Linux

jetson linux version is L4T 35.4.1.

pwm clock is :

root@tegra-ubuntu:/sys/kernel/debug/clk/pwm1# cat /sys/kernel/debug/clk/pwm1/clk_parent
pllp_out0
root@tegra-ubuntu:/sys/kernel/debug/clk/pwm1# cat /sys/kernel/debug/clk/pwm1/clk_possible_parents
pllp_out0 clk_32k clk_m

I set param is:

but the tested PWM waveform is as follows:

Single cycle error is 317ns， Single high-level time error is 35ns.
Is there any other way to optimize it？

[JerryChang]

hello asfsdgag,

may I know what’s the expectation?
for instance, what’s PWM periods and duty_cycle you’re going to achieve?

[asfsdgag]

hello JerryChang,
confirm the maximum accuracy that can be achieved,PWM preparation for XHS pulse signal of Sony IMX sensor.

[JerryChang]

hello asfsdgag,

as you can see of Topic 241462, comment #5.
please refer to an example to calculate possible rate of a PWM controller.