R38.4 SGTL5000 output audio

Hello NVIDIA engineers.
I’m debugging the SGTL5000 audio chip on a Jetson Thor R38.4, but I can’t get any audio output. Could you please offer some advice?
I’m following the same debugging approach I used on the Orin Nano, but it’s not working.:
SGTL5000 cannot output audio - Jetson Systems / Jetson Orin NX - NVIDIA Developer Forums

dts:

			ahub@9630000 {
				status = "okay";
				/* tegra_i2s1 */
				i2s@9280000 {
					status = "okay";
					ports {
						i2s1_port: port@1 {
							reg = <1>;
							i2s1_dap: endpoint {
								dai-format = "i2s";
								bitclock-master;
								frame-master;
								remote-endpoint = <&sgtl5000_ep>;
							};
						};
					};
				};

		/* i2c11 */
		i2c@810c6c0000 {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;
			sgtl5000: sgtl5000@0a {
				compatible = "fsl,sgtl5000";
				reg = <0x0a>;
				clocks = <&bpmp TEGRA264_CLK_AUD_MCLK>;
				clock-names = "mclk";
				micbias-resistor-k-ohms = <2>;
				micbias-voltage-m-volts = <1750>;
				VDDA-supply = <&vdd_1v8_cvb>;
				VDDIO-supply = <&vdd_1v8_cvb>;
				VDDD-supply = <&vdd_1v8_cvb>;
				status = "okay";
				
				sound-name-prefix = "H40-SGTL";
				
				port {
					sgtl5000_ep: endpoint {
						link-name = "fe-pi-audio-z-v2";
						remote-endpoint = <&i2s1_dap>;
						mclk-fs = <256>;
					};
				};
			};

sound {
	status = "okay";

	dais = /* ADMAIF (FE) Ports */
	       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
	       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
	       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
	       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
	       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
	       <&admaif20_port>, <&admaif21_port>, <&admaif22_port>, <&admaif23_port>,
	       <&admaif24_port>, <&admaif25_port>, <&admaif26_port>, <&admaif27_port>,
	       <&admaif28_port>, <&admaif29_port>, <&admaif30_port>, <&admaif31_port>,
	       /* XBAR Ports */
	       <&xbar_i2s1_port>, <&xbar_i2s4_port>,
	       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
	       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
	       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
	       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
	       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
	       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
	       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
	       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
	       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
	       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
	       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
	       <&xbar_amx5_in1_port>, <&xbar_amx5_in2_port>,
	       <&xbar_amx5_in3_port>, <&xbar_amx5_in4_port>,
	       <&xbar_amx6_in1_port>, <&xbar_amx6_in2_port>,
	       <&xbar_amx6_in3_port>, <&xbar_amx6_in4_port>,
	       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
	       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
	       <&xbar_adx5_in_port>, <&xbar_adx6_in_port>,
	       <&xbar_mix_in1_port>, <&xbar_mix_in2_port>,
	       <&xbar_mix_in3_port>, <&xbar_mix_in4_port>,
	       <&xbar_mix_in5_port>, <&xbar_mix_in6_port>,
	       <&xbar_mix_in7_port>, <&xbar_mix_in8_port>,
	       <&xbar_mix_in9_port>, <&xbar_mix_in10_port>,
	       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
	       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
	       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
	       <&xbar_asrc_in7_port>,
	       <&xbar_ope1_in_port>,
	       /* HW accelerators */
	       <&sfc1_out_port>, <&sfc2_out_port>,
	       <&sfc3_out_port>, <&sfc4_out_port>,
	       <&mvc1_out_port>, <&mvc2_out_port>,
	       <&amx1_out_port>, <&amx2_out_port>,
	       <&amx3_out_port>, <&amx4_out_port>,
	       <&amx5_out_port>, <&amx6_out_port>,
	       <&adx1_out1_port>, <&adx1_out2_port>,
	       <&adx1_out3_port>, <&adx1_out4_port>,
	       <&adx2_out1_port>, <&adx2_out2_port>,
	       <&adx2_out3_port>, <&adx2_out4_port>,
	       <&adx3_out1_port>, <&adx3_out2_port>,
	       <&adx3_out3_port>, <&adx3_out4_port>,
	       <&adx4_out1_port>, <&adx4_out2_port>,
	       <&adx4_out3_port>, <&adx4_out4_port>,
	       <&adx5_out1_port>, <&adx5_out2_port>,
	       <&adx5_out3_port>, <&adx5_out4_port>,
	       <&adx6_out1_port>, <&adx6_out2_port>,
	       <&adx6_out3_port>, <&adx6_out4_port>,
	       <&mix_out1_port>, <&mix_out2_port>, <&mix_out3_port>,
	       <&mix_out4_port>, <&mix_out5_port>,
	       <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
	       <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
	       <&ope1_out_port>,
	       /* BE I/O Ports */
	       <&i2s1_port>, <&i2s4_port>;

	assigned-clocks = <&bpmp TEGRA264_CLK_PLLA1>, <&bpmp TEGRA264_CLK_PLLA1_OUT1>, <&bpmp TEGRA264_CLK_AUD_MCLK>;
	assigned-clock-parents = <0>, <&bpmp TEGRA264_CLK_PLLA1>, <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
	assigned-clock-rates = <0>, <12288000>;
	// assigned-clocks = <&bpmp TEGRA264_CLK_AUD_MCLK>;
	// assigned-clock-rates = <12288000>;   // 12.288 MHz 用于 48kHz 采样率
	label = "NVIDIA Jetson Thor AGX APE";
	nvidia-audio-card,widgets =
		"Headphone",	"H40-SGTL Headphone",
		"Microphone",	"H40-SGTL Mic",
		"Line",		"H40-SGTL Line In",
		"Line",		"H40-SGTL Line Out";
	nvidia-audio-card,routing =
		"H40-SGTL Playback",  "I2S1 DAP-Playback",
		"I2S1 DAP-Capture",   "H40-SGTL Capture",
		"H40-SGTL Headphone",	"H40-SGTL HP_OUT",
		"H40-SGTL MIC_IN",	"H40-SGTL Mic",
		"H40-SGTL ADC",		"H40-SGTL Mic Bias",
		"H40-SGTL LINE_IN",	"H40-SGTL Line In",
		"H40-SGTL Line Out",	"H40-SGTL LINE_OUT";
	nvidia-audio-card,mclk-fs = <256>;
};

kernel : tegra_codecs.c:

tegra_codecs_runtime_setup:

int tegra_codecs_runtime_setup(struct snd_soc_pcm_runtime *rtd,
			       struct snd_pcm_hw_params *params)
{
	.....................

    rtd = get_pcm_runtime(card, "fe-pi-audio-z-v2");
    if (rtd) {
	for (unsigned int i = 0; i < rtd->dai_link->num_codecs; i++) {
		if (!strcmp(rtd->dais[rtd->dai_link->num_cpus + i]->name,
						"sgtl5000")) {
			err = snd_soc_dai_set_sysclk(
				rtd->dais[rtd->dai_link->num_cpus + i],
				SGTL5000_SYSCLK, aud_mclk,
				SND_SOC_CLOCK_IN);
			if (err < 0) {
				dev_err(card->dev,
					"dais[%d] clock not set\n",
					rtd->dai_link->num_cpus + i);
				return err;
			}
		}
	}
}

return 0;
}

dmesg: sudo dmesg | grep -E “sgtl5000|i2s|sound|i2c@810c6c0000”

nvidia@EATHA20:~$ sudo dmesg | grep -E "sgtl5000|i2s|sound|i2c@810c6c0000"
[    0.120464] /bus@0/i2c@810c6c0000/sgtl5000@0a: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000
[    0.121790] /bus@0/aconnect@9000000/ahub@9630000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@92b0000
[    0.121805] /bus@0/aconnect@9000000/ahub@9630000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000
[    0.121835] /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000: Fixed dependency cycle(s) with /bus@0/i2c@810c6c0000/sgtl5000@0a
[    0.121867] /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000
[    0.121902] /bus@0/aconnect@9000000/ahub@9630000/i2s@92b0000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000
[    0.129799] /bus@0/i2c@810c6c0000/sgtl5000@0a: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000
[    7.635389] /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000: Fixed dependency cycle(s) with /bus@0/i2c@810c6c0000/sgtl5000@0a
[    7.641436] /bus@0/i2c@810c6c0000/sgtl5000@0a: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000
[    7.995279]   No soundcards found.
[   14.365325] sgtl5000 11-000a: [sgtl5000] enable regulators.
[   14.398246] sgtl5000 11-000a: [sgtl5000] enable regulators end.
[   14.401698] sgtl5000 11-000a: sgtl5000 revision 0x11
[   14.418722] sgtl5000 11-000a: [sgtl5000] probe done.
[   14.750097] /bus@0/aconnect@9000000/ahub@9630000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@92b0000
[   14.750196] /bus@0/aconnect@9000000/ahub@9630000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000
[   14.767785] /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000
[   14.767832] /bus@0/aconnect@9000000/ahub@9630000/i2s@92b0000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000
[   14.888316] input: NVIDIA Jetson Thor AGX HDA HDMI/DP,pcm=3 as /devices/platform/bus@0/88090b0000.hda/sound/card0/input6
[   14.932641] input: NVIDIA Jetson Thor AGX HDA HDMI/DP,pcm=7 as /devices/platform/bus@0/88090b0000.hda/sound/card0/input7
[   14.962542] input: NVIDIA Jetson Thor AGX HDA HDMI/DP,pcm=8 as /devices/platform/bus@0/88090b0000.hda/sound/card0/input8
[   14.974082] input: NVIDIA Jetson Thor AGX HDA HDMI/DP,pcm=9 as /devices/platform/bus@0/88090b0000.hda/sound/card0/input9
[   15.080204] /bus@0/aconnect@9000000/ahub@9630000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000
[   15.106230] /bus@0/aconnect@9000000/ahub@9630000/i2s@9280000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000
[   15.109358] /bus@0/aconnect@9000000/ahub@9630000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000/i2s@92b0000
[   15.109448] /bus@0/aconnect@9000000/ahub@9630000/i2s@92b0000: Fixed dependency cycle(s) with /bus@0/aconnect@9000000/ahub@9630000
[   15.494649] sgtl5000 11-000a: [1] exceed max voltage vdda 1800000mV vddio 1800000mV vddd 1800000mV
[   15.533441] tegra-audio-graph-card sound: Registered APE graph sound card with DPCM links for AHUB
[   15.622694] tegra-mixer-controls sound:mixer-controls: Begin probe of override control device
[   15.641739] tegra-mixer-controls sound:mixer-controls: Registered override controls for APE sound card
nvidia@EATHA20:~$

AUDIO_MCLK01:

I2S1_CLK:

I2S1_DOUT:

HP_R/L:

When playing audio, no signal is detected on the HP_R/L pins.

sudo cat /sys/kernel/debug/regmap/11-000a/registers:

nvidia@EATHA20:~$ sudo cat /sys/kernel/debug/regmap/11-000a/registers
000: a011
002: 0070
004: 0008
006: 0000
00a: 0110
00e: 0200
010: 9898
014: 015f
020: 0000
022: 1b1b
024: 0023
026: 0000
028: 0041
02a: 0020
02c: 0304
02e: 0f0f
030: 48fb
032: 5000
034: 0800
036: 0017
03a: 0000
03c: 0000
100: 0001
102: 0000
104: 0040
106: 051f
108: 0003
10a: 0040
10c: 0000
10e: 0000
110: 0000
116: 002f
118: 002f
11a: 002f
11c: 002f
11e: 002f
120: 8000
122: 0000
124: 5100
126: 1472
128: 0028
12a: 0050
12c: 0000
12e: 0000
130: 0000
132: 0000
134: 0000
136: 0000
138: 0000
13a: 0000
nvidia@EATHA20:~$

amixer -c APE contents > contents.txt:

contents.txt (464.0 KB)

nvidia@EATHA20:~$ sudo cat /sys/kernel/debug/clk/clk_summary | grep mclk
aud_mclk 1 1 0 12287995 0 0 50000 Y sgtl5000@0a no_connection_id
nvidia@EATHA20:~$

tegra194-audio-p2822-0000.txt (16.3 KB)

These changes worked for SGTL5000 on Jetson AGX Xavier Industrial in 2024 for me. You can just compare and see, if it helps.

Thank you for your reply.
I’ve tried all of these rules. Previously, I got the audio working on Orin Nx using the audio driver.
However, on Thor, I suspect there are some differences between the device tree rules and the driver rules. When I applied the same rules to Thor, the audio didn’t work.

Hi,
Please try adding the following property to your SGTL5000 codec node in the Device Tree:
#sound-dai-cells = <0>;
Also, please make sure the assigned-clock-rates and assigned-clock-parents entries match the number and order of entries in assigned-clocks.
Thanks.

This node has been added, but it’s not being used.

The assigned-clocks under the soud node you mentioned—I’ve tried two configurations, but neither worked.

			
1:
sound {
	...............

	assigned-clocks = <&bpmp TEGRA264_CLK_PLLA1>, <&bpmp TEGRA264_CLK_PLLA1_OUT1>, <&bpmp TEGRA264_CLK_AUD_MCLK>;
	assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLA1>, <&bpmp TEGRA264_CLK_PLLA1_OUT1>, <&bpmp TEGRA264_CLK_AUD_MCLK>;
	assigned-clock-rates = <0>, <0>, <12288000>;
	...............
};

2:
sound {
	...............
		assigned-clocks = <&bpmp TEGRA264_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp TEGRA264_CLK_AUD_MCLK>;
		assigned-clock-rates = <12288000>;
    ...............
}

Is it related to “assigned-clock”? Since both my Aud_clk and I2S_CLK already have clocks, please refer to the oscilloscope image above.

问题已解决,该话题关闭。

JetpackR38不需要再修改tegra_codecs.c了。

只修改设备树即可。

Pls put updated working final device tree file here, it will be helpful for others. Thanks.

最开始提问题的设备树就是我最终的设备树。

只需要去掉tegra_codecs.c里面的修改就正常了。tegra_codecs_runtime_setup的修改会导致我的sgtl5000时钟初始化异常。

		i2c@810c6c0000 {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;
			sgtl5000: sgtl5000@0a {
				compatible = "fsl,sgtl5000";
				reg = <0x0a>;
				clocks = <&bpmp TEGRA264_CLK_AUD_MCLK>;
				// clock-names = "mclk";
				clock-names = "extern1";
				micbias-resistor-k-ohms = <2>;
				micbias-voltage-m-volts = <1750>;
				VDDA-supply = <&vdd_1v8_cvb>;
				VDDIO-supply = <&vdd_1v8_cvb>;
				VDDD-supply = <&vdd_1v8_cvb>;
				#sound-dai-cells = <0>;
				status = "okay";
				
				sound-name-prefix = "H40-SGTL";
				
				port {
					sgtl5000_ep: endpoint {
						link-name = "fe-pi-audio-z-v2";
						remote-endpoint = <&i2s1_dap>;
						mclk-fs = <256>;
					};
				};
			};
        };
				i2s@9280000 {
					status = "okay";
					ports {
						i2s1_port: port@1 {
							reg = <1>;
							i2s1_dap: endpoint {
								dai-format = "i2s";
								bitclock-master;
								frame-master;
								remote-endpoint = <&sgtl5000_ep>;
							};
						};
					};
				};

sound {
	status = "okay";

	dais = /* ADMAIF (FE) Ports */
	       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
	       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
	       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
	       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
	       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
	       <&admaif20_port>, <&admaif21_port>, <&admaif22_port>, <&admaif23_port>,
	       <&admaif24_port>, <&admaif25_port>, <&admaif26_port>, <&admaif27_port>,
	       <&admaif28_port>, <&admaif29_port>, <&admaif30_port>, <&admaif31_port>,
	       /* XBAR Ports */
	       <&xbar_i2s1_port>, <&xbar_i2s4_port>,
	       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
	       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
	       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
	       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
	       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
	       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
	       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
	       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
	       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
	       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
	       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
	       <&xbar_amx5_in1_port>, <&xbar_amx5_in2_port>,
	       <&xbar_amx5_in3_port>, <&xbar_amx5_in4_port>,
	       <&xbar_amx6_in1_port>, <&xbar_amx6_in2_port>,
	       <&xbar_amx6_in3_port>, <&xbar_amx6_in4_port>,
	       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
	       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
	       <&xbar_adx5_in_port>, <&xbar_adx6_in_port>,
	       <&xbar_mix_in1_port>, <&xbar_mix_in2_port>,
	       <&xbar_mix_in3_port>, <&xbar_mix_in4_port>,
	       <&xbar_mix_in5_port>, <&xbar_mix_in6_port>,
	       <&xbar_mix_in7_port>, <&xbar_mix_in8_port>,
	       <&xbar_mix_in9_port>, <&xbar_mix_in10_port>,
	       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
	       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
	       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
	       <&xbar_asrc_in7_port>,
	       <&xbar_ope1_in_port>,
	       /* HW accelerators */
	       <&sfc1_out_port>, <&sfc2_out_port>,
	       <&sfc3_out_port>, <&sfc4_out_port>,
	       <&mvc1_out_port>, <&mvc2_out_port>,
	       <&amx1_out_port>, <&amx2_out_port>,
	       <&amx3_out_port>, <&amx4_out_port>,
	       <&amx5_out_port>, <&amx6_out_port>,
	       <&adx1_out1_port>, <&adx1_out2_port>,
	       <&adx1_out3_port>, <&adx1_out4_port>,
	       <&adx2_out1_port>, <&adx2_out2_port>,
	       <&adx2_out3_port>, <&adx2_out4_port>,
	       <&adx3_out1_port>, <&adx3_out2_port>,
	       <&adx3_out3_port>, <&adx3_out4_port>,
	       <&adx4_out1_port>, <&adx4_out2_port>,
	       <&adx4_out3_port>, <&adx4_out4_port>,
	       <&adx5_out1_port>, <&adx5_out2_port>,
	       <&adx5_out3_port>, <&adx5_out4_port>,
	       <&adx6_out1_port>, <&adx6_out2_port>,
	       <&adx6_out3_port>, <&adx6_out4_port>,
	       <&mix_out1_port>, <&mix_out2_port>, <&mix_out3_port>,
	       <&mix_out4_port>, <&mix_out5_port>,
	       <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
	       <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
	       <&ope1_out_port>,
	       /* BE I/O Ports */
	       <&i2s1_port>, <&i2s4_port>;
	clocks = <&bpmp TEGRA264_CLK_PLLA1>,
	 		<&bpmp TEGRA264_CLK_PLLA1_OUT1>,<&bpmp TEGRA264_CLK_AUD_MCLK>;
	clock-names = "pll_a", "plla_out0", "extern1";
	assigned-clocks = <&bpmp TEGRA264_CLK_PLLA1>, <&bpmp TEGRA264_CLK_PLLA1_OUT1>, <&bpmp TEGRA264_CLK_AUD_MCLK>;
	assigned-clock-parents = <0>, <&bpmp TEGRA264_CLK_PLLA1>, <&bpmp TEGRA264_CLK_PLLA1_OUT1>;
	assigned-clock-rates = <0>, <12288000>;
	// assigned-clocks = <&bpmp TEGRA264_CLK_AUD_MCLK>;
	// assigned-clock-parents = <&bpmp TEGRA264_CLK_AUD_MCLK>;
	// assigned-clock-rates = <0>, <0>, <12288000>;
	label = "NVIDIA Jetson Thor AGX APE";
	widgets =
		"Headphone",	"H40-SGTL Headphone",
		"Microphone",	"H40-SGTL Mic",
		"Line",		"H40-SGTL Line In",
		"Line",		"H40-SGTL Line Out";
	routing =
		"H40-SGTL Playback",  "I2S1 DAP-Playback",
		"I2S1 DAP-Capture",   "H40-SGTL Capture",
		"H40-SGTL Headphone",	"H40-SGTL HP_OUT",
		"H40-SGTL MIC_IN",	"H40-SGTL Mic",
		"H40-SGTL ADC",		"H40-SGTL Mic Bias",
		"H40-SGTL LINE_IN",	"H40-SGTL Line In",
		"H40-SGTL Line Out",	"H40-SGTL LINE_OUT";
	mclk-fs = <256>;
};