Consider a system with an FPGA-based PCIe device as endpoint, and the Jetson AGX Orin as root complex. I’m facing an issue, and it rises a flag about the final implementation:
a) I need to reboot the Jetson after progamming FPGA, because the device wasn’t enumerated/found, and it isn’t shown in lspci.
b) Considering an FPGA boot from flash, would be possible the Jetson to be ready before the FPGA boot.
I found some topics about other Jetsons, but nothing about the Agx Orin. Then, here are my questions:
Is it possible to implement a hot-plug pcie device in Jetson Agx Orin?
Can I execute a rescan without rebooting? I tried the “echo 1 > /sys/bus/pci/rescan”, but without success.
I’m using a Jetson Agx Orin DevKit, but maybe it will be migrated to industrial module. The tegra release is R32, revision 2.1.