Some questions in using pinmux-dts2cfg.py

Hello nVidia Support,

I use the pinmux file for Xavier NX to generate my new dtsi files. (I only made two minor changes where set some GPIO output from 0 to 1).

Then I use the pinmux-dts2cfg.py to convert the .dtsi to .cfg file.

Here are the commands and errors i got:

user@user-System-Product-Name:~/xavier_nx/35.1.1/Linux_for_Tegra/kernel/pinmux/t19x$ python pinmux-dts2cfg.py --pinmux addr_info.txt gpio_addr_info.txt por_val.txt --mandatory_pinmux_file mandatory_pinmux.txt tegra19x-jetson_xavier_nx_module_1018_gpio-pinmux.dtsi tegra19x-jetson_xavier_nx_module_1018_gpio-gpio-default.dtsi 1.0 > tegra19x-jetson_xavier_nx_module_1018_gpio_p3668-a01.cfg

ERROR: pin dap3_sclk_pt1(0x00000440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dap3_fs_pt4(0x00000440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin eqos_rd3_pf1(0x00022470) field nvidia,lpbk(0x00000020) is not matching, val = 0x01 expected = 0x00
ERROR: pin eqos_sma_mdio_pf4(0x00022440) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin sdmmc4_cmd(0x00002440) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin soc_gpio10_pg6(0x00000410) field nvidia,tristate(0x00000010) is not matching, val = 0x01 expected = 0x00
ERROR: pin gp_pwm2_px2(0x00000410) field nvidia,tristate(0x00000010) is not matching, val = 0x01 expected = 0x00
ERROR: pin uart2_tx_px4(0x00000400) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin uart2_rx_px5(0x00000450) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin can0_dout_paa2(0x0000c400) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin can0_din_paa3(0x0000c450) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin uart3_tx_pcc5(0x00000400) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin uart3_rx_pcc6(0x00000450) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin soc_gpio22_pq2(0x00000459) field nvidia,pull(0x0000000c) is not matching, val = 0x02 expected = 0x00
ERROR: pin uart1_tx_pr2(0x00000400) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin uart1_rx_pr3(0x00000454) field nvidia,pull(0x0000000c) is not matching, val = 0x01 expected = 0x02

Would you please advice anything wrong here?

could you also elaborate how the .cfg file are being used when building the kernel and dtb files?

After I made the changes in pinmux file(configure for some gpio), how should I modify the main dts file? Could you point me to some guides in how to modify the dtsi files?

Thank you.
Mei Guodong

Hello,

this issue is resolved by removing below part in the command:
–mandatory_pinmux_file mandatory_pinmux.txt

thanks.
Mei

Hi meiguodong,

Could this script work to convert dtsi to cfg before you modify the dtsi directly?

It is recommended to use pinmux spreadsheet to generate the dtsi and use the script to convert it to cfg rather than modify dtsi directly.

Hi Kevin,

I was using the spreadsheet to generate the .dtsi file and convert to .cfg. As noted in above, this issue is resolved.

However, I have one more issue:

after I converted tegra19x-jetson_xavier_nx_module-padvoltage-default.dtsi file to a .cfg file, i copied. the .cfg file to $JETPACK/bootloader/t186ref/BCT folder;

and included that padvoltage*.dtsi file in tegra194-p3509-0000-a00.dtsi file, and
here is the snippet of the code:
include <dt-bindings/gpio/tegra194-gpio.h>
include “dt-bindings/input/input.h”
include “tegra194-fixed-regulator-p3509-0000-a00.dtsi”
include “tegra194-p3509-disp.dtsi”
include “tegra194-audio-p3668.dtsi”
include “tegra194-super-module-e2614-p3509.dtsi”
include “tegra194-camera-jakku-rbpcv3-imx477.dtsi”
include “tegra194-camera-jakku-rbpcv2-imx219.dtsi”
include “tegra19x-jetson_xavier_nx_module-pinmux.dtsi”
include “tegra19x-jetson_xavier_nx_module-gpio-default.dtsi”
/*include “tegra19x-jetson_xavier_nx_module-padvoltage-default.dtsi”

when I run make ARCH=arm64 O=$KERNEL_OUT CROSS_COMPILE=$CROSS_COMPILE -j8,

i got an error as below;

Error: /home/user/xavier_nx/35.1.1/Linux_for_Tegra/source/public/kernel/kernel-5.10/arch/arm64/boot/dts/…/…/…/…/…/…/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra19x-jetson_xavier_nx_module-padvoltage-default.dtsi:44.35-36 syntax error
FATAL ERROR: Unable to parse input tree
make[2]: *** [/home/user/xavier_nx/35.1.1/Linux_for_Tegra/source/public/kernel/kernel-5.10/arch/arm64/boot/dts/Makefile:80: arch/arm64/boot/dts/ddot/ddot/ddot/ddot/ddot/ddot/hardware/nvidia/platform/t19x/jakku/kernel-dts/tegra194-p3668-all-p3509-0000.dtb] Error 1
make[2]: *** Waiting for unfinished jobs…
Error: /home/user/xavier_nx/35.1.1/Linux_for_Tegra/source/public/kernel/kernel-5.10/arch/arm64/boot/dts/…/…/…/…/…/…/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra19x-jetson_xavier_nx_module-padvoltage-default.dtsi:44.35-36 syntax error
FATAL ERROR: Unable to parse input tree
make[2]: *** [/home/user/xavier_nx/35.1.1/Linux_for_Tegra/source/public/kernel/kernel-5.10/arch/arm64/boot/dts/Makefile:80: arch/arm64/boot/dts/ddot/ddot/ddot/ddot/ddot/ddot/hardware/nvidia/platform/t19x/jakku/kernel-dts/tegra194-p3668-0000-p3509-0000.dtb] Error 1
make[1]: *** [/home/user/xavier_nx/35.1.1/Linux_for_Tegra/source/public/kernel/kernel-5.10/Makefile:1391: dtbs] Error 2
make[1]: *** Waiting for unfinished jobs…
CHK include/generated/compile.h
make[1]: Leaving directory ‘/home/user/xavier_nx/35.1.1/Linux_for_Tegra/images’
make: *** [Makefile:213: __sub-make] Error 2

I enclosed relevant files here.

Please would you advice anything wrong here in my steps?

thank you.
unable_to_pass_device_tree.txt (5.6 KB)
tegra19x-jetson_xavier_nx_module-padvoltage-default.dtsi (1.3 KB)
tegra194-p3509-0000-a00.txt (5.2 KB)

Thank you.
Mei Guodong

Could this command work before you update .cfg and .dtsi?
(i.e. could you build kernel image and dtb successfully before any modification?)

Please refer to Linux_for_Tegra/kernel/pinmux/t19x/README.
To convert pad file to cfg format, use the following command line:

  •    python pinmux-dts2cfg.py --pad PAD_FILE PAD_DTS VERSION [--mask] [--help]*
    

You should also convert pad dtsi to .cfg with python script instead of including this dtsi.

Hi Kevin,

If I do not include padvoltage*.dtsi file in the tegra194-p3509-0000-a00.dtsi file, then the make will succeed.

I have one more question: after I convert these .dtsi file to .cfg, and copied these .cfg files to $JETPACK/bootloader/t186ref/BCT folder, and I made sure the .cfg file names matches with those specified in the p3668.conf.common file.

After this, do I need to include these three .dtsi file(generated from spreadsheet file) in the tegra194-p3509-0000-a00.dtsi file?

thank you.
Mei Guodong

Even I have similar questions what Mei Guodong has.
Even I am trying to build customized image for my customized carrier board.
I am also planning to use PIN MUX sheet for generation of DTSI files and after that the process of converting them to .CFG files etc in detail is not clear.

It would be very helpful to give the correct approach to follow for building a successful customized image.

Note:

  1. I have many configuration changes already done in the .dtsi file by manually editing , where some interfaces are working. Will all those changes goes off If I overwrite the new DTSI files generated from the PIN MUX SPREADSHEET method??
  2. Cannot we have mix and match method of manually editing some DTSI files and some DTSI file getting generate by PIN MUX spreadsheet? Kindly clarify. Thanks

No, you just need to update .cfg file.

Please refer to <Linux_for_Tegra>/kernel/pinmux/t19x/README in details.

We would suggest using pinmux spreadsheet instead of modifying dtsi directly.
Your board would just recognize the content in .cfg for pinmux so that please convert the .dtsi to .cfg.

As I mentioned above, we would suggest just using pinmux spreadsheet to generate dtsi.
If you want to modify it manually, you should know the limitation of every pin and its usage correctly.

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