SPI bus on Jetson NANO L4T 32.4.3 not working

Hi,
Thanks for testing. Just for confirmation that the steps you have done is reflected after boot, can you check below command:
ls /proc/device-tree/spi@7000d400/spi@0
does not list controller-data.
Meanwhile, Am checking what else has changed from J4.3 to J4.4

Thanks,
Shubhi

Also, would like to know any failure messages you saw in dmesg while communicating? It would be helpful to know where exactly is the failure.
Any garbage data you are receiving?

ls /proc/device-tree/spi@7000d400/spi@0
only lists the following nodes:
compatible
name
reg
spi-max-frequency

I compared the list with JP4.3 and something is missing:
nvidia,enable-hw-based-cs
nvidia,rx-clk-tap-delay

dmesg is not reporting any error related to SPI.

My problem is that I’m receiving garbage data

Thanks.
Yes these 2 properties are in controller-data now(J4.4) to make it work with main SPI driver. Previously, they were directly added in slave (spi@0) which won;t have any affect. So, it is not the problem.
Am checking from other modules side which affects SPI if anything is changed.

Maybe that I found something… thanks to a Github user:
https://github.com/Myzhar/Lepton3_Jetson/issues/2#issuecomment-693274740

Changing SPI mode from 3 to 1 at code level for the spidev driver the communication starts to work.
#define SPI_MODE_1 (0|SPI_SPHA)
...
#define SPI_MODE_3 (SPI_CPOL|SPI_SPHA)

I do not understand why this happens

Hi,
Want to know was it the same mode (Mode3) with J4.3?
Mode3 with J4.3 is working but not with J4.4?

Also, you can try the same patch listed in other forum thread: Two SPI bugs on Jetson Nano - #4 by bobfu

diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index d6e50c9…cc6c820 100644
— a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -1455,10 +1455,8 @@ static int tegra_spi_transfer_one_message(struct spi_master *master,
msg->actual_length += xfer->len;

complete_xfer:
- if (prefer_last_used_cs)
cmd1 = tspi->command1_reg;
- else
- cmd1 = tspi->def_command1_reg;
+
if (ret < 0 || skip) {
if (cstate && cstate->cs_gpio_valid)
gpio_set_value(spi->cs_gpio, gval);

And this change will show up in J4.5
but I am curious to know that Mode3 was working in J4.3??

Yes, MODE3 wa correctly working on JP4.3
I must change it to MODE1 in JP4.4 to get data correctly.

I add more: setting MODE1 in JP4.3 doesn’t break the communication. On JP4.3 still working even with MODE1.

Thanks for the info.
I can check now in this direction.

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Hi Myzhar,
Can you please let me know if above patch solves MODE3 issue?

I’m sorry @shgarg I have not yet applied the patch because I was concentrating on completing the project.
I will test it as soon as possible

Hi Myzhar,

Is this still an issue to support? Any result can be shared?

Hi @kayccc
for me the issue is solved. SPI works correctly. I tried the patch (sorry if I forgot to report it) and it’s ok

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