Nano jetson SPI enable issue

[babbelal.patel1]

HI Team,

I have install image in jetson nano board. And i am not getting spi port.
So please let me know?

thanks,
Babbelal

[NVES]

Hi,
This looks like a Jetson issue. Please refer to the below samlples in case useful.

GitHub - dusty-nv/jetson-inference: Hello AI World guide to deploying...

GitHub - NVIDIA-AI-IOT/torch2trt: An easy to use PyTorch to TensorRT converter

For any further assistance, we recommend you to raise it to the respective platform from the below link

Jetson & Embedded Systems

Thanks!

[babbelal.patel1]

Hi Team,

1. I am using jetson nano b01 device.
cimcon@cimcon:/lib/modules/4.9.140-tegra/kernel/drivers/spi$ dmesg |grep dts
[ 0.211728] DTS File Name: /dvs/git/dirty/git-master_linux/kernel/kernel-4.9/arch/arm64/boot/dts/…/…/…/…/…/…/hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0002-p3449-0000-b00.dts
[ 0.420012] DTS File Name: /dvs/git/dirty/git-master_linux/kernel/kernel-4.9/arch/arm64/boot/dts/…/…/…/…/…/…/hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0002-p3449-0000-b00.dts

2----I have Add spi-dev in tegra210-p3448-0002-p3449-0000-b00.dts
spi@7000d400 {
spi@0 {
compatible = “spidev”;
reg = <0x0>;
spi-max-frequency = <0x1f78a40>;
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x7>;
};
spi@1 {
compatible = “spidev”;
reg = <0x1>;
spi-max-frequency = <0x1f78a40>;
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x7>;
};
};

3. After that build the kernel and load egra210-p3448-0002-p3449-0000-b00.dts in my target device and load spi driver
cimcon@cimcon:/lib/modules/4.9.140-tegra/kernel/drivers/spi$ ls
spi-cadence.ko spidev.ko spi-pxa2xx-pci.ko spi-pxa2xx-platform.ko spi-sc18is602.ko spi-tle62x0.ko spi-xcomm.ko spi-zynqmp-gqspi.ko
cimcon@cimcon:/lib/modules/4.9.140-tegra/kernel/drivers/spi$ sudo insmod spidev.ko
cimcon@cimcon:/lib/modules/4.9.140-tegra/kernel/drivers/spi$

4 - After that i am not getting spi interface in /dev directory.

Please let me know if I have not change valid dts file and data.

[babbelal.patel1]

Please update me. How can enable SPI port in /dev ?

[ShaneCCC]

Have try below command.

sudo modprobe spidev

[babbelal.patel1]

My Issue was resolved after add only tegra210-p3448-0002-p3449-0000-b00.dtb file.

Thanks

[babbelal.patel1]

Hi Team,

I have enable spi in our board after that i have test spi0. I am getting Null data.
cimcon@cimcon:~/spidev-test-master$
sudo ./spi_test -D /dev/spidev0.0 -v -p “1234abcd”
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | 31 32 33 34 61 62 63 64 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ | 1234abcd
RX | 00 00 00 00 00 00 00 00 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ | …

Please help me. Why i am getting RX null data ?

My SPI enable steps:

1. dmesg |grep dts
   [ 0.212071] DTS File Name: …/arch/arm64/boot/dts/…/…/…/…/…/…/hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0000-p3449-0000-b00.dts

2)build dts.
make -C . ARCH=arm64 O=$TEGRA_KERNEL_OUT LOCALVERSION=-tegra CROSS_COMPILE=${TOOLCHAIN_PREFIX} -j8 --output-sync=target dtbs

tegra210-p3448-0000-p3449-0000-b00.dts (3.4 KB)

3. move dtb on jetson board.

4. Add dtb in /boot/extlinux/extlinux.conf file.
   IMEOUT 30
   DEFAULT primary

MENU TITLE L4T boot options

LABEL primary
MENU LABEL primary kernel
LINUX /boot/Image
INITRD /boot/initrd
FDT /boot/tegra210-p3448-0000-p3449-0000-b00.dtb
APPEND ${cbootargs} quiet root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0

When testing a custom kernel, it is recommended that you create a backup of

the original kernel and add a new entry to this file so that the device can

fallback to the original kernel. To do this:

1, Make a backup of the original kernel

sudo cp /boot/Image /boot/Image.backup

2, Copy your custom kernel into /boot/Image

3, Uncomment below menu setting lines for the original kernel

4, Reboot

LABEL backup

MENU LABEL backup kernel

LINUX /boot/Image.backup

INITRD /boot/initrd

APPEND ${cbootargs}

Regards,
Babbelal

[ShaneCCC]

Didn’t you short the pin19/21 for loopback test?

[babbelal.patel1]

I have not short above pins. Can you tell me name of this pins?

Have you check my dts file. Please update me if any other update in dts file related SPI?

[ShaneCCC]

Check below pin map. You are using spi0 aks SPI_1_* and need connect SPI_1_MOSI/SPI_1_MISO for loopback test.

NVIDIA Jetson Nano J41 Header Pinout - JetsonHacks

[babbelal.patel1]

I have connect SPIO MISO and MOSI and test again.

I am not getting data.

I have connect SPI0 MOSI/MISO line with scope analyzer and I am not getting any data on TX and RX.

In application show.
cimcon1@cimcon1:~/spidev-test-master$ ./spidev_test -D /dev/spidev0.0 -v -p “1234444abcd”
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)

TX | 31 32 33 34 34 34 34 61 62 63 64 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ | 1234444abcd

RX | 00 00 00 00 00 00 00 00 00 00 00 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ | …

cimcon1@cimcon1:~/spidev-test-master$ sudo grep -C 4 spi1 /sys/kernel/debug/pinctrl/pinctrl-maps
device 700008d4.pinmux
state default
type MUX_GROUP (2)
controlling device 700008d4.pinmux
group spi1_mosi_pc0
function rsvd1

device 700008d4.pinmux
state default
type CONFIGS_GROUP (4)
controlling device 700008d4.pinmux
group spi1_mosi_pc0
config pull=1
config tristate=0
config enable-input=1

device 700008d4.pinmux
state default
type MUX_GROUP (2)
controlling device 700008d4.pinmux
group spi1_miso_pc1
function rsvd1

device 700008d4.pinmux
state default
type CONFIGS_GROUP (4)
controlling device 700008d4.pinmux
group spi1_miso_pc1
config pull=1
config tristate=0
config enable-input=1

device 700008d4.pinmux
state default
type MUX_GROUP (2)
controlling device 700008d4.pinmux
group spi1_sck_pc2
function rsvd1

device 700008d4.pinmux
state default
type CONFIGS_GROUP (4)
controlling device 700008d4.pinmux
group spi1_sck_pc2
config pull=1
config tristate=0
config enable-input=1

device 700008d4.pinmux
state default
type MUX_GROUP (2)
controlling device 700008d4.pinmux
group spi1_cs0_pc3
function rsvd1

device 700008d4.pinmux
state default
type CONFIGS_GROUP (4)
controlling device 700008d4.pinmux
group spi1_cs0_pc3
config pull=2
config tristate=0
config enable-input=1

device 700008d4.pinmux
state default
type MUX_GROUP (2)
controlling device 700008d4.pinmux
group spi1_cs1_pc4
function rsvd1

device 700008d4.pinmux
state default
type CONFIGS_GROUP (4)
controlling device 700008d4.pinmux
group spi1_cs1_pc4
config pull=2
config tristate=0
config enable-input=1

cimcon1@cimcon1:~/spidev-test-master$

Please check my dts file. I think something will be missing. Please let me know.

[ShaneCCC]

Could you have jetson-io to configure the SPI to verify it.

Thanks

[babbelal.patel1]

I am unable to run jetson-io commands.

sudo /opt/nvidia/jetson-io/jetson-io.py

[ShaneCCC]

Can you check the pin state from below command.

sudo cat /sys/kernel/debug/tegra_gpio

[babbelal.patel1]

cimcon1@cimcon1:~$ sudo cat /sys/kernel/debug/tegra_gpio
Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL
A: 0:0 64 40 40 04 00 00 000000
B: 0:1 f0 00 00 00 00 80 008000
C: 0:2 1f 00 00 18 00 00 000000
D: 0:3 00 00 00 00 00 00 000000
E: 1:0 40 00 00 00 00 00 000000
F: 1:1 00 00 00 00 00 00 000000
G: 1:2 0c 00 00 00 00 00 000000
H: 1:3 fd 99 00 60 00 00 000000
I: 2:0 07 07 03 00 00 00 000000
J: 2:1 f0 00 00 00 00 00 000000
K: 2:2 00 00 00 00 00 00 000000
L: 2:3 00 00 00 00 00 00 000000
M: 3:0 00 00 00 00 00 00 000000
N: 3:1 00 00 00 00 00 00 000000
O: 3:2 00 00 00 00 00 00 000000
P: 3:3 00 00 00 00 00 00 000000
Q: 4:0 00 00 00 00 00 00 000000
R: 4:1 00 00 00 00 00 00 000000
S: 4:2 a0 80 00 00 00 00 000000
T: 4:3 01 01 00 00 00 00 000000
U: 5:0 00 00 00 00 00 00 000000
V: 5:1 03 00 00 02 00 00 000000
W: 5:2 00 00 00 00 00 00 000000
X: 5:3 78 08 08 70 00 60 606000
Y: 6:0 06 00 00 02 00 00 000000
Z: 6:1 0f 08 00 04 00 04 000400
AA: 6:2 00 00 00 00 00 00 000000
BB: 6:3 01 00 00 00 00 00 000000
CC: 7:0 92 80 80 02 00 12 121200
DD: 7:1 01 00 00 00 00 00 000000
EE: 7:2 00 00 00 00 00 00 000000
FF: 7:3 00 00 00 00 00 00 000000
cimcon1@cimcon1:~$

[ShaneCCC]

Looks like the GPIO state is incorrect.
Apply below patch to confirm it.

Issues with Jetson Nano Production and Jetson-io (and jetpack 4.6 rev1)

Apply this patch without the kernel GPIO patch and add the 40pin head SPI pin configure. diff --git a/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-a02.dtsi b/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-a02.dtsi index b520de5..56f9140 100644 --- a/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-a02.dtsi +++ b/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-a02.dtsi @@ -1,6 +1,6 @@ -/*This dtsi file was generated by T210_P3448_SKU2_pinmux.xlsm Revision: 8 */…

[babbelal.patel1]

Hi,

I have follow lot of forums and google link but my SPI bus ISSUE is not resolved through dts file.
Can you share some documents for enable SPI in kernel 4.9 ?

Regards,
Babbelal

[babbelal.patel1]

Hi,

Can I get any commercial support services in India ? If you, Please provide contact details.

Thanks,
Babbelal patel

[anon17926827]

You should confirm that the pinmux configuration of spi-pins is correct.
the file is tegra210-porg-pimux-p3448-0000-b00.dtsi.

[ShaneCCC]

1. I think you can update to J4.6(r32.6.1) to run the jetson-io I have confirm this version able to run jetson-io
2. You can check which dtb by dmesg | grep kernel
3. Sorry, We don’t have support team in India