Spi devicetree iusee

Hi

 I use orinnx,  kernel version is 5.10.216-tegra 

The SPI controller of Orinx connects to the IMU (ICM42688P).

The schematic diagram is shown as below: SPI1_CS0 serves as the SPI chip select signal,

while SPI1_CS1 pin is reused as the hardware interrupt pin of the IMU.

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My Schematic is ZHY_X2_MAIN_V1.1更新封装.pdf

ZHY_X2_MAIN_V1.1更新封装.pdf (956.6 KB)

How should the Device Tree be configured? Please supply a demo, thank you!

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Now, my devicetree file is tegra234-p3767-0000-p3768-0000-a0.dts,

but dmesg |grep spi show the error infomation:

tegra234-p3767-0000-p3768-0000-a0.zip (2.7 KB)

tegra234-p3767-0000-p3768-0000-a0.zip after decompress is tegra234-p3767-0000-p3768-0000-a0.dts

tegra234-p3767-0000-p3768-0000-a0(2).zip after decompress is tegra234-p3767-0000-p3768-0000-a0.dtb

tegra234-p3767-0000-p3768-0000-a0 (2).zip (56.8 KB)

Hi kamus10,

Are you using the devkit or custom board for Orin NX?
What’s the Jetpack version in use?

As you are using the custom IMU module, please request for the sample configuration and related porting steps from your vendor.

Have you configured this pin as Input in pinmux spreadsheet before use?

pinmux spreadsheet——no,I use the default bct-pinmux

Are you using the devkit or custom board for Orin NX?

——custom board

What’s the Jetpack version in use?

——R35.4.1

Linux ubuntu 5.10.216-tegra #15 SMP PREEMPT Sat Jun 27 10:45:36 CST 2026 aarch64 aarch64 aarch64 GNU/Linux

cat /etc/nv_tegra_release

R35 (release), REVISION: 6.1, GCID: 39721438, BOARD: t186ref, EABI: aarch64, DATE: Tue Mar 4 10:13:09 UTC 2025

sorry, I was wrong earlier.

dpkg-query --show nvidia-l4t-core
nvidia-l4t-core 35.6.1-20250304015758

Please help me to check the Jetson_Orin_NX_and_Orin_Nano_series_Pinmux_Config_Template_v1.2.xlsm

Jetson Orin Nano&NX Pinmux HDMI

Please help me to check the

Modify_files.zip (8.8 KB)

Modify_files.zip

After modify pinmux, still can’t read imu id

You have to configure the pinmux before using the pins.

I would expect that the MOSI/SCK/CS0 are configured as Output pins as you are using SPI as master.

To use SPI1_CS1 as hardware interrupt for IMU, is it low active or high active in your case?

Could you check with your vendor for the error reported by custom inv-icm42600 driver?
It seems the WHOAMI register reading failed.
Please also get the scope or LA to measure if they are all zero so it returns 0x00.

I have changed the *bct-*.dtsi,in the attachment

Issue-description-spi-imu.docx (211.2 KB)

tegra234-mb1-bct-gpio-p3767-dp-a03.dtsi.txt (3.6 KB)

tegra234-p3767-0000-p3768-0000-a0.dts.txt (6.8 KB)

tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi.txt (65.8 KB)

tegra234-mb1-bct-padvoltage-p3767-dp-a03.dtsi.txt (2.4 KB)

Please refer to the following table for the valid configuration in pinmux spreadsheet.

Are you using inv_icm42600_spi.c driver currently?

Have you checked these?

I use icm42600 driver, but I have modify it to support icm42688p

I have got the scope or LA to measure, they are all zero so it returns 0x00(The firmware version which in my testing, is the yesterday version).

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Then, I will changge the *bct-pinmux*.dtsi, reference your recommendation

inv_icm42600.zip (31.3 KB)

After modify .bct-*.dtsi, the fllowing cmd is right or wrong? if it is wrong, please tell me the right cmd.

sudo ./flash.sh -c bootloader/t186ref/cfg/flash_t234_qspi.xml --no-systemimg -k A_MB1_BCT jetson-orin-nano-devkit nvme0n1p1

Have you confirmed with your vendor that icm42600 driver supports the icm42688p module you are using?

Please simply performing SPI loopback test to confirm if you have configured the pinmux correctly.

It looks good to me, but you can also perform the full flash.

After modify .bct-*.dtsi, the fllowing cmd is right or wrong? if it is wrong, please tell me the right cmd.

sudo ./flash.sh --sign -k mb1 -k A_MB1_BCT -k B_MB1_BCT -c bootloader/t186ref/cfg/flash_t234_qspi_nvme.xml jetson-orin-nano-devkit internal