Support SC16IS752 in jetson nano device

,

Hi,

Question1:
(1) I have connect SC16IS752 IC with I2C interface.
What will be add in dtsi file for accessing Uart ?

Question2:
(2) I have connect another SC16IS752 IC with SPI interface.
What will be add in dtsi file for accessing Uart ?

Thanks,
Babbelal patel

Hi @babbelal.patel1,

This topic may be better served in the Jetson Nano category. I will move it over for you.

Maybe can reference to below link.

Hi I have enable bellow command for build SC16IS7XX driver. But driver is not building. I have attache updated config file..cocciconfig (196.0 KB)

CONFIG_SERIAL_SC16IS7XX=m
CONFIG_SERIAL_SC16IS7XX_CORE=m
CONFIG_SERIAL_SC16IS7XX_I2C=y
CONFIG_SERIAL_SC16IS7XX_SPI=y

Please check my attached and update me.

My device is running based on kernel_tegra210-p3448-0000-p3449-0000-b00-hdr40-user-custom.dtbo file. I have found this file name when enable SPI using below commands.
sudo /opt/nvidia/jetson-io/jetson-io.py

So Can you provide me source file name of kernel_tegra210-p3448-0000-p3449-0000-b00-hdr40-user-custom.dtbo ?

regards,
Babbelal

There’s no source for it, it’s generate by tools(jetson-io.py)
Below is the context to enable SPI function.
Add below in the pinmux@700008d4 {}

		header-40pin-pinmux {
			phandle = <0x136>;
			linux,phandle = <0x136>;

			pin37 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi2_mosi_pb4";
				nvidia,function = "spi2";
			};

			pin28 {
				nvidia,io-high-voltage = <0x1>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x0>;
				nvidia,pins = "gen1_i2c_scl_pj1";
				nvidia,function = "i2c1";
			};

			pin27 {
				nvidia,io-high-voltage = <0x1>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x0>;
				nvidia,pins = "gen1_i2c_sda_pj0";
				nvidia,function = "i2c1";
			};

			pin26 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x2>;
				nvidia,pins = "spi1_cs1_pc4";
				nvidia,function = "spi1";
			};

			pin24 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x2>;
				nvidia,pins = "spi1_cs0_pc3";
				nvidia,function = "spi1";
			};

			pin23 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi1_sck_pc2";
				nvidia,function = "spi1";
			};

			pin22 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi2_miso_pb5";
				nvidia,function = "spi2";
			};

			pin21 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi1_miso_pc1";
				nvidia,function = "spi1";
			};

			pin19 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi1_mosi_pc0";
				nvidia,function = "spi1";
			};

			pin18 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x2>;
				nvidia,pins = "spi2_cs0_pb7";
				nvidia,function = "spi2";
			};

			pin16 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x2>;
				nvidia,pins = "spi2_cs1_pdd0";
				nvidia,function = "spi2";
			};

			pin13 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi2_sck_pb6";
				nvidia,function = "spi2";
			};

			pin10 {
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x1>;
				nvidia,pull = <0x2>;
				nvidia,pins = "uart2_rx_pg1";
				nvidia,function = "uartb";
			};

			pin8 {
				nvidia,enable-input = <0x0>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x0>;
				nvidia,pins = "uart2_tx_pg0";
				nvidia,function = "uartb";
			};

			pin5 {
				nvidia,io-high-voltage = <0x1>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x0>;
				nvidia,pins = "gen2_i2c_scl_pj2";
				nvidia,function = "i2c2";
			};

			pin3 {
				nvidia,io-high-voltage = <0x1>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x0>;
				nvidia,pins = "gen2_i2c_sda_pj3";
				nvidia,function = "i2c2";
			};
		};

Can you tell me dts file name ?

Sorry for my previous comment for the source.
The source is in below path.

…/hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0000-p3449-0000-hdr40.dtsi

Hi Team,

I am getting two file here related to hdr40. And I have attached also.
Please check and let me know, In which file I need to update ?
What will be changes for below pins ?

For SPI1:
pin 19 mosi
pin 21 miso
pin 23 sck
pin 24 cso
pin 26 cs1

For SPI1:
pin 22 miso
pin 37 mosi
pin 13 sck
pin 18 cs0
pin 16 cs1

tegra210-p3448-0000-p3449-0000-a02-hdr40.dts
tegra210-p3448-0000-p3449-0000-a01-hdr40.dts

thanks,
Babbelal
tegra210-p3448-0000-p3449-0000-a02-hdr40.dts (5.9 KB)
tegra210-p3448-0000-p3449-0000-a01-hdr40.dts (5.9 KB)

Hi Team,

As you mentioned above, I have update SPI1 pins for 19,21,23,24 and 26 in both file. After that I have test /dev/spidev0.0 and getting data null.

cimcon1@cimcon1:~/spidev-test-master$ ./spidev_test -D /dev/spidev0.0 -v -p “1234444abcd”
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)

TX | 31 32 33 34 34 34 34 61 62 63 64 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ | 1234444abcd
RX | 00 00 00 00 00 00 00 00 00 00 00 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ | …

Please find my updated files.

tegra210-p3448-0000-p3449-0000-a01-hdr40.dts (6.7 KB)

tegra210-p3448-0000-p3449-0000-a02-hdr40.dts (6.7 KB)

Thanks,
Babbelal

What’s your version? cat /etc/nv_tegra_release

What’s the pin status.

sudo cat /sys/kernel/debug/tegra_gpio

Hi Team,

cimcon1@cimcon1:~/spidev-test-master$ sudo cat /sys/kernel/debug/tegra_gpio
[sudo] password for cimcon1:
Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL
A: 0:0 64 40 40 04 00 00 000000
B: 0:1 f0 00 00 f0 00 00 000000
C: 0:2 1f 00 00 1f 00 00 000000
D: 0:3 00 00 00 00 00 00 000000
E: 1:0 40 00 00 40 00 00 000000
F: 1:1 00 00 00 00 00 00 000000
G: 1:2 0c 00 00 0c 00 00 000000
H: 1:3 fd 99 00 60 00 00 000000
I: 2:0 07 07 03 00 00 00 000000
J: 2:1 f0 00 00 f0 00 00 000000
K: 2:2 00 00 00 00 00 00 000000
L: 2:3 00 00 00 00 00 00 000000
M: 3:0 00 00 00 00 00 00 000000
N: 3:1 00 00 00 00 00 00 000000
O: 3:2 00 00 00 00 00 00 000000
P: 3:3 00 00 00 00 00 00 000000
Q: 4:0 00 00 00 00 00 00 000000
R: 4:1 00 00 00 00 00 00 000000
S: 4:2 a0 80 00 20 00 00 000000
T: 4:3 01 01 00 00 00 00 000000
U: 5:0 00 00 00 00 00 00 000000
V: 5:1 03 00 00 03 00 00 000000
W: 5:2 00 00 00 00 00 00 000000
X: 5:3 78 08 08 70 00 60 606000
Y: 6:0 06 00 00 06 00 00 000000
Z: 6:1 0f 08 00 05 00 04 000400
AA: 6:2 00 00 00 00 00 00 000000
BB: 6:3 01 00 00 01 00 00 000000
CC: 7:0 92 80 80 12 00 12 121200
DD: 7:1 01 00 00 01 00 00 000000
EE: 7:2 00 00 00 00 00 00 000000
FF: 7:3 00 00 00 00 00 00 000000

Please check and let me update.

thanks,
Babbelal

What’s your BSP version? And does you Nano is emmc version?
If emmc version apply below patch.

Hello Team.

sc16is752 SPI driver probe function is not called.

In my device have 2 spi port.
cimcon@cimcon:/sys/class/spidev$ ls -l
total 0
lrwxrwxrwx 1 root root 0 Jul 22 00:22 spidev0.0 → …/…/devices/7000d400.spi/spi_master/spi0/spi0.0/spidev/spidev0.0
lrwxrwxrwx 1 root root 0 Jul 22 00:22 spidev1.0 → …/…/devices/7000d600.spi/spi_master/spi1/spi1.0/spidev/spidev1.0

After Add below in tegra210-soc-shield.dtsi for SPI-1

spi@7000d400 {
	status = "okay";
	compatible = "nxp,sc16is752";
	clocks = <&sc16is752_clk1>;
	gpio-controller;
	spi-max-frequency = <4000000>;
	interrupt-parent = <&gpio>;
	interrupts = <15 2>;
	reg = <0>;
	#gpio-cells = <0x0>;
	sc16is752_clk1: sc16is752_0_clk {
	compatible = "fixed-clock";
	#clock-cells = <0>;
	clock-frequency = <14745600>;
        };
};

After that i am getting only one spi port and my driver probe function are not called. Please check and let me know.

Regards,
Babbelal

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