Jetson Orin AGX, Technical reference manual has no information on Ethernet MAC. May I get a document which has this information?
I am referring DP-10508-002. In revision history it is mentioned that there were two previous version exists 1.0 and 1.1 for TRM. May I get previous versions?
This Nvidia document discusses mac for Jetson:
The page you shared is about setting up MAC address.
I need TRM for MAC controller to see its register set and other software related recommendations.
Please use the latest TRM version at https://developer.nvidia.com/downloads/orin-series-soc-technical-reference-manual/
Check revision history for what changes have been updated/applied.
Also, below link might help on SW configuration
Jetson AGX Orin Platform Adaptation and Bring-Up — NVIDIA Jetson Linux Developer Guide
Thanks for pointing to the TRM. I have already read this TRM but it does not contain any information on 1G Ethernet controller “register set”.
User level ethernet configuration is covered in
Jetson AGX Orin Platform Adaptation and Bring-Up — NVIDIA Jetson Linux Developer Guide
Does this not help?
No it doesn’t.
I am interested in TRM not the configuration through DTS.
If there is any other document which gives me the required information about the Ethernet controller. Would you please refer it to me?
There is no such document.
This might be a step in the right direction?
git clone -b jetson_35.6 “https://nv-tegra.nvidia.com/r/device/hardware/nvidia/soc/t23x”
nano t23x/kernel-dts/tegra234-soc/tegra234-soc-eqos.dtsi
Thank you very much for the suggestion.
Well there is a huge difference in the technical details available in Technical reference manual and the DTS.
The DTS has runtime information to configure the Ethernet controller.
Whereas I am rewriting the Ethernet driver(for layer 2) to do some custom implementation so that is why I need information about the register space of the MAC controller.
Perhaps you could do a more precise search on chat than I but here’s
“Deep research” = “Can you think of any thing more potential documentation on register space of the MAC controller on the AGX Orin soc?”
It requested clarification so based on your post about 1gb I asked it “1G EQOS MAC full memory-mapped register definitions (names, offsets, bitfields) for the MAC controller. and if any official documentation.”
Attached is its response. The footnotes provide links to the source docs.
overview_1g_eqosmac.pdf (45.2 KB)