时间戳引擎

Edsonsl111 · March 19, 2026, 10:36am

我想了解orin tsc和gte模块，能不能接pwm的输出，用于采集过去pwm的上升沿的时间戳，请问你们有没有具体的方案告知一下？

carolyuu · March 19, 2026, 10:48am

*** Please note that this reply is generated by LLM automatically ***

Based on the provided context, there is no specific information about “Jetson AGX Orin orin tscgtepwmpwm”. However, I can provide some general information about the Jetson AGX Orin series and its power management features.

The Jetson AGX Orin series, along with the Jetson Orin NX and Jetson Orin Nano series, provides various power management features to deliver the best user experience possible. These features include:

Power management: The Jetson AGX Orin series has a power management system that allows for dynamic voltage and frequency scaling, which helps to optimize power consumption and performance.
Thermal management: The Jetson AGX Orin series has a thermal management system that monitors the temperature of the device and adjusts the performance accordingly to prevent overheating.
Electrical management: The Jetson AGX Orin series has an electrical management system that monitors the power consumption of the device and adjusts the performance accordingly to prevent electrical overload.

The Jetson AGX Orin series also provides various tools and techniques for power management, such as:

NVIDIA’s JetPack SDK, which provides a set of tools and APIs for power management.
The Jetson Board Support Package (BSP), which provides a set of software components and tools for power management.
The Jetson Linux Developer Guide, which provides documentation and guidance on power management features and tools.

In comparison to other Jetson series, the Jetson AGX Orin series has similar power management features to the Jetson Orin NX and Jetson Orin Nano series. However, the Jetson AGX Orin series has more advanced features and capabilities, such as:

Higher performance: The Jetson AGX Orin series has higher performance capabilities than the Jetson Orin NX and Jetson Orin Nano series.
More advanced power management: The Jetson AGX Orin series has more advanced power management features, such as dynamic voltage and frequency scaling, which allows for more efficient power consumption.
More advanced thermal management: The Jetson AGX Orin series has more advanced thermal management features, such as thermal throttling, which helps to prevent overheating.

In summary, while there is no specific information about “Jetson AGX Orin orin tscgtepwmpwm”, the Jetson AGX Orin series has advanced power management features that allow for efficient power consumption and high performance.

*** Please give the thumbs up if you get answers you like. Or provide feedback to help us improve the answer. ***

KevinFFF · March 20, 2026, 2:38am

Hi Edsonsl111,

Are you using the devkit or custom board for AGX Orin?
What’s the Jetpack version in use?

You can’t feed PWM directly into Orin’s GTE.
Alternatively, you can use a PWM pin to generate the signal, loop it into an AON GPIO configured as rising-edge IRQ, and use GTE on that GPIO interrupt to get timestamps for each PWM rising edge.

Edsonsl111 · March 20, 2026, 2:47am

你好我是使用的自制板子做的agx orin，目前使用的是jp5.1.4，我目前的话在/Linux_for_Tegra/source/public/hardware/nvidia/soc/t23x/kernel-dts/tegra234-soc/tegra234-soc-base.dtsi的设备树里有关tge的是如下内容

tegra_aon_gpio: gpio@c2f0000 {

    compatible = "nvidia,tegra234-gpio-aon";

    reg-names = "security", "gpio";

    reg =   <0x0 0xc2f0000 0x0 0x1000>,

        <0x0 0xc2f1000 0x0 0x1000>;

    interrupts =

        <0 TEGRA234_IRQ_AON_GPIO_0 IRQ_TYPE_LEVEL_HIGH>,

        <0 TEGRA234_IRQ_AON_GPIO_1 IRQ_TYPE_LEVEL_HIGH>,

        <0 TEGRA234_IRQ_AON_GPIO_2 IRQ_TYPE_LEVEL_HIGH>,

        <0 TEGRA234_IRQ_AON_GPIO_3 IRQ_TYPE_LEVEL_HIGH>;

    gpio-controller;

    #gpio-cells = <2>;

    interrupt-controller;

    #interrupt-cells = <2>;

    gpio-ranges =

        <&tegra_pinctrl TEGRA234_MAIN_GPIO_OFFSET TEGRA234_MAIN_PINS_A_TO_Z TEGRA234_AON_PINS_AA>,

        <&tegra_pinctrl TEGRA234_AON_PINS_AA TEGRA234_AON_PINCTRL_OFFSET_BB TEGRA234_AON_PINS_BB_TO_GG>;

    status = "disabled";

};

tegra_gte_lic: gte@3aa0000 {

            compatible = "nvidia,tegra194-gte-lic";

            reg = <0x0 0x3aa0000 0x0 0x10000>;

            interrupts = <0 11 0x4>;

            nvidia,int-threshold = <1>;

            nvidia,num-slices = <17>;

            status = "disabled";

    };



    tegra_gte_aon: gte@c1e0000 {

            compatible = "nvidia,tegra234-gte-aon";

            reg = <0x0 0xc1e0000 0x0 0x10000>;

            interrupts = <0 13 0x4>;

            nvidia,int-threshold = <1>;

            nvidia,num-slices = <3>;

            nvidia,gpio-controller = <&tegra_aon_gpio>;

            status = "disabled";

    };

在/Linux_for_Tegra/source/public/hardware/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-0000-a04.dtsi的设备树下有关gte的是如下内容

gte@c1e0000 {

    status = "okay";

};



gpio@c2f0000 {

    /delete-property/ use-timestamp;

};

在/Linux_for_Tegra/source/public/hardware/nvidia/soc/t23x/kernel-include/dt-bindings/gpio下的tegra234-gpio.h里面有关aon的宏定义是如下内容

define TEGRA234_AON_GPIO_PORT_AA 0

define TEGRA234_AON_GPIO_PORT_BB 1

define TEGRA234_AON_GPIO_PORT_CC 2

define TEGRA234_AON_GPIO_PORT_DD 3

define TEGRA234_AON_GPIO_PORT_EE 4

define TEGRA234_AON_GPIO_PORT_GG 5

define TEGRA234_AON_GPIO(port, offset) \
((TEGRA234_AON_GPIO_PORT\_##port \* 8) + offset)
endif

目前考虑使用的是GPIO35-PH.00 - gpio-391的引脚，请问我该如何去做一些更改呢？

Edsonsl111 · March 20, 2026, 5:26am

我理解的是将pwm的输出引脚接再aon gpio簇支持的引脚上，然后通过将aon gpio簇里的引脚通过修改为上升沿的中断触发来使用gte来获得该gpiod 时间戳进而了解pwm的上升沿的时间戳，这样理解正确吗？所以我是否只需要在pinmux的设备树中修改aon gpio簇里的某个gpio为上升沿触发就行了，其余的我并不需要去做修改？

KevinFFF · March 23, 2026, 2:32am

Your understanding is basically correct: the path should be PWM → AON GPIO (rising-edge IRQ) → GTE, and you don’t connect PWM directly to GTE.

A few details:

tegra_gte_aon only works with the AON GPIO controller, so GPIO35-PH.00 (gpio-391) (a MAIN GPIO) cannot be used with gte@c1e0000. You must choose a pin from the AON GPIO group (AA..GG).
In your board DTSI you should set both tegra_aon_gpio and tegra_gte_aon to status = "okay".
In the pinmux / board DTSI, configure the chosen AON GPIO as GPIO input with IRQ type = rising edge. Apart from enabling these nodes, you don’t need extra GTE-specific changes in DT.
Then route your PWM signal to that AON GPIO pin on the board and read the timestamps from the GTE driver.

Edsonsl111 · March 25, 2026, 1:36am

请问我具体的应该在那些设备树做更改呢？我有点不太确定更改的位置，并且我是否应该在板级dtsi上添加一个IRQ的节点或者是做什么其他的更改呢？我认为在soc相关的设备树代码应该要尽量避免去做修改，但是我在其他的设备树中并没有找到tegra_aon_gpio相关的设备树节点

Edsonsl111 · March 25, 2026, 2:30am

我目前更换的是6.2.3的内核，我看了官方的相关文档是使用了hte，请问我是不是应该在tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi里添加

#define GPIO_IN  TEGRA234_AON_GPIO(DD, 1)
#define GPIO_OUT TEGRA234_AON_GPIO(DD, 2)

tegra_hte_test {
    status = "okay";
    compatible = "nvidia,tegra194-hte-test";
    in-gpios = <&gpio_aon GPIO_IN GPIO_ACTIVE_LOW>;
    out-gpios = <&gpio_aon GPIO_OUT GPIO_ACTIVE_LOW>;
    timestamps = <&hte_aon GPIO_IN>, <&hte_lic 0x19>;
    timestamp-names = "hte-gpio", "hte_lic";
};

这个节点，另外我的目的是能够检测PWM01的上升沿的时间戳，我是否是将out改为pwm的引脚将in改为任意的AON簇里面的某一个引脚就可以了呢？除此之外我是否还需要修改the-tegra194-test.c里面的内容？这些更改做完以后我是否还需要将in使用的引脚在pinmux上做些更改然后将pwm的引脚和AON的gpio使用的in引脚来进行飞线连接，这些做完是否就可以了呢？

Edsonsl111 · March 25, 2026, 3:33am

我期望的是检测pwm的引脚，用pwm引脚做输出，AON的引脚比如PAA0做输入，是否可以将设备树的节点更改为这样

tegra_hte_test {
status = “okay”;
compatible = “nvidia,tegra194-hte-test”;

in-gpios = <&tegra_aon_gpio TEGRA234_AON_GPIO(DD, 1) GPIO_ACTIVE_LOW>;

timestamps = <&hte_aon TEGRA234_AON_GPIO(DD, 1)>;

timestamp-names = “hte-gpio”;
};

Edsonsl111 · March 26, 2026, 3:04am

请问能给我一个答复吗非常感谢

KevinFFF · March 30, 2026, 3:28am

Sorry for the late reply that I was in vacation.

You can either create a custom overlay or modify the existing device tree.
Please just confirm it has been loaded correctly.

Do you mean that you are using Jetpack 5.1.4 with K6.2.3 (rather than default 5.10.216-tegra)?
If so, please refer to Generic Timestamp Engine — NVIDIA Jetson Linux Developer Guide for HTE configuration.

Please share the full dmesg and device tree after you’ve finished whole steps listed in document.

Why you want to use PAA.00 but you configure PDD.01 in device tree?

Edsonsl111 · March 30, 2026, 3:33am

设备树我复制错了，是还没更改过的，我的意思是我目前的话是移植替换为了jp6.2.3的所有内容，因为6.2.3的内容将gte更改为了hte，可能我的表达有点混论，我的目的是希望使用AON引脚簇里的PAA.00做输出然后和我的pwm引脚之间通过外接线连接在一起，我应该在那个设备树里做一些修改呢？并且我是否需要修改驱动代码里面的内容

Edsonsl111 · March 30, 2026, 5:26am

    aon@c000000 {

        status = "okay";

    };



    hardware-timestamp@c1e0000 {

        status = "okay";

        nvidia,num-slices = <3>;

    };

    tegra_hte_test {

         status = "okay";

        compatible = "nvidia,tegra194-hte-test";

        in-gpios = <&gpio_aon TEGRA234_AON_GPIO(AA,0) GPIO_ACTIVE_LOW>;

        timestamps = <&hte_aon TEGRA234_AON_GPIO(AA,0)>;

         timestamp-names = "hte-gpio";

};

请问在tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi设备树里我这样写相关的设备树节点有问题吗？除此之外我是否只需要将PAA0的pinmux设置为输入，将pwm引脚和PAA0的引脚进行外部连接在一起是否就可以了？请问我还需要在做其他的更改吗，希望你能为我指出，非常感谢

Edsonsl111 · March 30, 2026, 7:06am

另外我在tegra234.dtsi里面看看到了如下所示的设备树节点信息

    sce-fabric@b600000 {

        compatible = "nvidia,tegra234-sce-fabric";

        reg = <0x0 0xb600000 0x0 0x40000>;

        interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;

        status = "okay";

    };



    rce-fabric@be00000 {

        compatible = "nvidia,tegra234-rce-fabric";

        reg = <0x0 0xbe00000 0x0 0x40000>;

        interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;

        status = "okay";

    };



    hsp_aon: hsp@c150000 {

        compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";

        reg = <0x0 0x0c150000 0x0 0x90000>;

        interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,

                 <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,

                 <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,

                 <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;

        /\*

         \* Shared interrupt 0 is routed only to AON/SPE, so

         \* we only have 4 shared interrupts for the CCPLEX.

         \*/

        interrupt-names = "shared1", "shared2", "shared3", "shared4";

        #mbox-cells = <2>;

    };除此之外我还应该做那些更改呢。



    hte_aon: hardware-timestamp@c1e0000 {

        compatible = "nvidia,tegra234-gte-aon";

        reg = <0x0 0xc1e0000 0x0 0x10000>;

        interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

        nvidia,int-threshold = <1>;

        nvidia,gpio-controller = <&gpio_aon>;

        #timestamp-cells = <1>;

    };

Edsonsl111 · March 31, 2026, 2:17am

1.我的gpio.dts 和pinmux.dts里面的内容如下面所示pr00是我的pwm的引脚我希望是能够捕捉pwm的时间戳

soc_gpio37_pr0 {

            nvidia,pins = "soc_gpio37_pr0";

            nvidia,function = "gp";

            nvidia,pull = <TEGRA_PIN_PULL_NONE>;

            nvidia,tristate = <TEGRA_PIN_DISABLE>;

            nvidia,enable-input = <TEGRA_PIN_DISABLE>;

            nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;

            nvidia,lpdr = <TEGRA_PIN_DISABLE>;

        };

        can0_dout_paa0 {

            nvidia,pins = "can0_dout_paa0";

            nvidia,function = "can0";

            nvidia,pull = <TEGRA_PIN_PULL_NONE>;

            nvidia,tristate = <TEGRA_PIN_DISABLE>;

            nvidia,enable-input = <TEGRA_PIN_DISABLE>;

        };

gpio_aon_default: default {

        gpio-input = <

            TEGRA234_AON_GPIO(EE, 5)

            TEGRA234_AON_GPIO(EE, 6)

            TEGRA234_AON_GPIO(EE, 2)

            TEGRA234_AON_GPIO(EE, 4)

            TEGRA234_AON_GPIO(CC, 0)

            TEGRA234_AON_GPIO(CC, 1)

            TEGRA234_AON_GPIO(CC, 2)

            TEGRA234_AON_GPIO(CC, 3)

            TEGRA234_AON_GPIO(BB, 0)

            TEGRA234_AON_GPIO(BB, 1)

            TEGRA234_AON_GPIO(AA, 0)

            >;

在tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi里的有关我新添加的节点内容如下

    tegra_hte_test {

        status = "okay";

        compatible = "nvidia,tegra194-hte-test";

        in-ggpios = <&gpio_aon TEGRA234_AON_GPIO(AA,0) GPIO_ACTIVE_LOW>;

        out-gpios = <&gpio_aon  TEGRA234_AON_GPIO(PP,0) GPIO_ACTIVE_LOW>;

        timestamps = <&hte_aon TEGRA234_AON_GPIO(AA,0)>;

        timestamp-names = "hte-gpio";

    };

mttcan@c310000 {

        status = "disabled";

    };



    mttcan@c320000 {

        status = "disabled";

    };

请问我修改的这些有问题吗？驱动的话我没做过任何更改

KevinFFF · March 31, 2026, 6:14am

Sorry that we don’t have JP6.2.3. Do you mean JP6.2.2(L4T r36.5)?

You can simply update hardware/nvidia/t23x/nv-public/nv-platform/tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi with your customization.

It seems you have not configured PAA.00 to be used as GPIO. (i.e. its function should not be can0)

There’s no PPP.00 for AGX Orin. Please use other GPIO from AON controller.

Edsonsl111 · March 31, 2026, 9:10am

这是我修改过的请问这些是正确的嘛

        can0_dout_paa0 {

            nvidia,pins = "can0_dout_paa0";

            nvidia,function = "gp";

            nvidia,pull = <TEGRA_PIN_PULL_NONE>;

            nvidia,tristate = <TEGRA_PIN_ENABLE>;

            nvidia,enable-input = <TEGRA_PIN_ENABLE>;

        };

    tegra_hte_test {

        status = "okay";

        compatible = "nvidia,tegra194-hte-test";

        in-ggpios = <&gpio_aon TEGRA234_AON_GPIO(AA,0) GPIO_ACTIVE_LOW>;

        out-gpios = <&gpio_aon  TEGRA234_AON_GPIO(PR,0) GPIO_ACTIVE_LOW>;

        timestamps = <&hte_aon TEGRA234_AON_GPIO(AA,0)>;

        timestamp-names = "hte-gpio";

    };

KevinFFF · April 1, 2026, 4:48am

It is still not the expected result to me.
Please use pinmux spreadsheet to configure it and it should be looking like the following.

			can0_dout_paa0 {
				nvidia,pins = "can0_dout_paa0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

We don’t have Port PR from AON controller.
Which AON pin do you want to output for hardware timestamp?

Edsonsl111 · April 1, 2026, 5:04am

我的目标是用AON引脚来抓pwm脉冲的上升沿，这个PR0是我的pwm的引脚，我应该如何写这个节点呢

Edsonsl111 · April 2, 2026, 5:58am

哈喽，请问我这样设计有没有问题或者说我应该将节点里的out删除掉

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