TX1 boot failed when TSI721(PCIE to SRIO Bridge) reset deassert

We designed a bottom board that supports TX1, which allows TX1 to boot normally.

There is also a TSI721 chip on the bottom board that connects to PCIE0 (4x) on TX1.A PCIE switch chip, which is connected with TX1’s PCIE1 (1x).
The power up sequence of TX1 is controlled by the on-board MCU. MUC can also read the internal registers of TSI721 through I2C to confirm whether TSI721 is started successfully. The MCU can read the PCIE_RESET signal sent by TX1 and then send the reset signal to the TSI721 chip.

Now the problem is encountered, if power-on reset TSI721 and then released, TX1 can not start, UBOOT stop testing MMC step. If power-on reset TSI721 but do not release, TX1 can start, but UBOOT can not find the device on PCIE0 Lane, and can not find the device on PCIE1 Lane. However, the device on PCIE1 Lane (PCIE switch) does not affect TX1’s success.

Now I set the MCU to configure the MCU after the completion of the TSI721 and PCIE switch reset enabled, if the detection of TX1’s PCIE1_RESET assert, the output reset signal to the PCIE switch, if not, it is not reset. If PCIE0 is so set, TX1 will not start. If you want TX1 to start, you can keep TSI721’s reset assert.

How to resolve the conflict and keep all the equipment running?

Thanks!

PS:Incomplete UBOOT code

[2017-12-28 16:29:25.103 R]0001.058] EMC Training Successful
[0001.061] EMC Training (SRC-freq: 204000; DST-freq: 1331200)

[2017-12-28 16:29:25.125 R]�001.082] EMC Training Successful
[0001.085] EMC Training (SRC-freq: 204000; DST-freq: 1600000)

[2017-12-28 16:29:25.219 R]�001.105] EMC Training Successful
0001.108] Switching to 800000 KHz Success
�001.117] DT Write: emc-table@40800 succeeded
�001.123] DT Write: emc-table@68000 succeeded
�001.129] DT Write: emc-table@102000 succeeded
�001.135] DT Write: emc-table@204000 succeeded
0001.141] DT Write: emc-table@408000 succeeded
�001.147] DT Write: emc-table@665600 succeeded
�001.153] DT Write: emc-table@800000 succeeded
�001.159] DT Write: emc-table@1065600 succeeded
�001.165] DT Write: emc-table@1331200 succeeded
�001.171] DT Write: emc-table@1600000 succeeded
[0001.175] LPDDR4 Training: Write DT: Number of tables = 10

[2017-12-28 16:29:25.253 R]

U-Boot 2015.07-rc2-g78c8468 (Sep 28 2016 - 17:48:16 -0700)

TEGRA210

Model: NVIDIA P2371-2180

DRAM: 4 GiB

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[2017-12-28 16:29:25.270 R]dH��egra SD/MMC: 0, Tegra SD/MMC: 1

[2017-12-28 16:29:25.353 R]�
[2017-12-28 16:29:25.387 R]** Warning - bad CRC, using default environment

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==================================================================

==================================================================

Here stucking, and can not continue UBOOT. If TSI7221’s reset never deassert ,TX1 will boot normally, the UBOOT will continue

==================================================================

==================================================================

[2017-12-28 16:24:38.461 R]’$H��egra SD/MMC: 0, Tegra SD/MMC: 1

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[2017-12-28 16:24:38.589 R]** Warning - bad CRC, using default environment

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[2017-12-28 16:24:42.030 R] 1
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[2017-12-28 16:24:43.034 R] 0

MMC: no card present

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[2017-12-28 16:24:43.795 R]��
[2017-12-28 16:24:43.812 R],ning mmc 0:1…

[2017-12-28 16:24:44.357 R]�
[2017-12-28 16:24:44.379 R]o]d /boot/extlinux/extlinux.conf

Retrieving file: /boot/extlinux/extlinux.conf

[2017-12-28 16:24:44.596 R]o
[2017-12-28 16:24:44.618 R]^ސ�ytes read in 217 ms (3.9 KiB/s)

p2371-2180 eMMC boot options

1: primary kernel

Enter choice:
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[2017-12-28 16:24:48.621 R]�
[2017-12-28 16:24:48.704 R]0267792 bytes read in 506 ms (38.2 MiB/s)

append: fbcon=map:0 console=tty0 console=ttyS0,115200n8 androidboot.modem=none androidboot.serialno=P2180A00P00940c003fd androidboot.security=non-secure tegraid=21.1.2.0.0 ddr_die=2048M@2048M ddr_die=2048M@4096M section=256M memtype=0 vpr_resize usb_port_owner_info=0 lane_owner_info=0 emc_max_dvfs=0 touch_id=0@63 video=tegrafb no_console_suspend=1 debug_uartport=lsport,0 earlyprintk=uart8250-32bit,0x70006000 maxcpus=4 usbcore.old_scheme_first=1 lp0_vec=0x1000@0xff2bf000 nvdumper_reserved=0xff23f000 core_edp_mv=1125 core_edp_ma=4000 gpt android.kerneltype=normal androidboot.touch_vendor_id=0 androidboot.touch_panel_id=63 androidboot.touch_feature=0 androidboot.bootreason=pmc:software_reset,pmic:0x0 net.ifnames=0 root=/dev/mmcblk0p1 rw rootwait

Retrieving file: /boot/tegra210-jetson-tx1-p2597-2180-a01-devkit.dtb

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[2017-12-28 16:24:49.116 R]���ead of GPIO expander reg 5 failed: -121

ERROR: Cannot read board ID EEPROM

WARNING: failed to read board EEPROM

���ead of GPIO expander reg 5 failed: -121


[2017-12-28 16:24:49.133 R]
Wtarting kernel …

[2017-12-28 16:24:49.281 R]� 0.000000] Initializing cgroup subsys cpuset
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Initializing cgroup subsys cpuacct
[ 0.000000] Linux version 3.10.96-tegra (buildbrain@mobile-u64-1010) (gcc version 4.8.2 (GCC) ) #1 SMP PREEMPT Wed Sep 28 17:51:08 PDT 2016
[ 0.000000] CPU: Cortex A57 Processor [411fd071] revision 1

Hi yixiti,

Not sure if you’re using custom u-boot.
You can refer to “U-Boot Customization”->“Downloading and Building U-Boot” section in https://developer.nvidia.com/embedded/dlc/l4t-documentation-28-2 to get the source code and then debug this further in u-boot.