TX1 + RT5639/40 in R32.3.1

Hi:
I’m using TX1+RT5639,
It works well in R32.2.x with the patch (01-tegra-rt5639.conf and pin configs in u-boot).

In R32.3.1, the pin-config moves to DTS, I follow the method to modify the hardware\nvidia\platform\t210\jetson\kernel-dts\jetson-platforms\tegra210-jetson-cv-pinmux-p2597-2180-a00.dtsi.

==========================================

					aud_mclk_pbb0 {
						nvidia,pins = "aud_mclk_pbb0";
						nvidia,function = "aud";
						nvidia,pull = <TEGRA_PIN_PULL_NONE>;
						nvidia,tristate = <TEGRA_PIN_DISABLE>;
						nvidia,enable-input = <TEGRA_PIN_DISABLE>;
					};

					dap1_din_pb1 {
						nvidia,pins = "dap1_din_pb1";
						nvidia,function = "i2s1";
						nvidia,pull = <TEGRA_PIN_PULL_NONE>;
						nvidia,tristate = <TEGRA_PIN_DISABLE>;
						nvidia,enable-input = <TEGRA_PIN_DISABLE>;
					};

					dap1_dout_pb2 {
						nvidia,pins = "dap1_dout_pb2";
						nvidia,function = "i2s1";
						nvidia,pull = <TEGRA_PIN_PULL_NONE>;
						nvidia,tristate = <TEGRA_PIN_DISABLE>;
						nvidia,enable-input = <TEGRA_PIN_DISABLE>;
					};

					dap1_fs_pb0 {
						nvidia,pins = "dap1_fs_pb0";
						nvidia,function = "i2s1";
						nvidia,pull = <TEGRA_PIN_PULL_NONE>;
						nvidia,tristate = <TEGRA_PIN_DISABLE>;
						nvidia,enable-input = <TEGRA_PIN_DISABLE>;
					};

					dap1_sclk_pb3 {
						nvidia,pins = "dap1_sclk_pb3";
						nvidia,function = "i2s1";
						nvidia,pull = <TEGRA_PIN_PULL_NONE>;
						nvidia,tristate = <TEGRA_PIN_DISABLE>;
						nvidia,enable-input = <TEGRA_PIN_DISABLE>;
					};

==========================================

Now the Sound shows, but it’s not Audible via headphone.

Can anybody comment?

Hello!

Starting with r32.3.1, we have added a new tool, ‘jetson-io’, for configuring the pins on the 40-pin header. Please see the document for details and let me know if this helps …

https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fhw_setup_jetson_io.html%23

Regards,
Jon

Hi:

When I use the “jetson-io” tool,
The behavior “Test Sound” in “system settings->sound” is even not correct.

And the sound does’t output from the audio jack neither.

the following is my routing

tegra_sound: sound {
    compatible = "nvidia,tegra-audio-t210ref-mobile-rt5639";
    nvidia,model = "tegra-snd-t210ref-mobile-rt5639";
    realtek,in1-differential = <1>;
    sel_jd_source = <3>;
    nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(E, 6) GPIO_ACTIVE_HIGH>;

	clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
		 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
		 <&tegra_car TEGRA210_CLK_D_AUDIO>,
		 <&tegra_car TEGRA210_CLK_EXTERN1>;
	clock-names = "pll_a", "pll_a_out0", "ahub", "extern1";
	assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>,
			  <&tegra_car TEGRA210_CLK_EXTERN1>;
	assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
				 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;

	nvidia,num-codec-link = <8>;

	nvidia,audio-routing =
		"x Headphone",		"x OUT",
		"x IN",			"x Mic",
        "x Headphone Jack", 	"x HPOL",
        "x Headphone Jack", 	"x HPOR",
        "x Int Spk", 	"x SPORP",
        "x Int Spk", 	"x SPORN",
        "x Int Spk", 	"x SPOLP",
        "x Int Spk", 	"x SPOLN",
        "x micbias1",	"x Mic Jack",
        "x IN2P",		"x Mic Jack",
        "x IN2P",		"x Mic Jack",
        "x DMIC L1",	"x Int Mic",
        "x DMIC L2",	"x Int Mic",
        "x DMIC R1",	"x Int Mic",
        "x DMIC R2",	"x Int Mic",
		"y Headphone",		"y OUT",
		"y IN",			"y Mic",
        "z Headphone", 	"z OUT",
		"z IN",			"z Mic",
        "l IN",		"l OUT",
        "s Headphone", 	"s OUT",
        "s IN",		"s Mic";

	nvidia,xbar = <&tegra_axbar>;
	mclk-fs = <256>;

	/* The codec-dai here is initialized to dummy and will be   */
	/* replaced with rt565x codec-dai on detecting super-module */
	nvidia,dai-link-1 {
		link-name = "rt5640-playback";
		cpu-dai = <&tegra_i2s1>;
		codec-dai = <&rt5640>;
		cpu-dai-name = "I2S1";
		codec-dai-name = "rt5640-aif1";
		format = "i2s";
        bitclock-slave;
        frame-slave;
        bitclock-noninversion;
        frame-noninversion;			
		bit-format = "s16_le";
		srate = <48000>;
		num-channel = <2>;
		name-prefix = "x";
	};

and the I2C setting

i2c@7000c000 {
	rt5640: rt5640.0-001c@1c {
		status = "okay";
		compatible = "realtek,rt5640";
		reg = <0x1c>;
		realtek,ldo1-en-gpios =	<&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_HIGH>;
		sel_jd_source = <3>;
	};
};

Any other comment?

Hello!

Yes that is expected because the ‘jetson-io’ tool is only for configuring the pinmux so that the pins on the 40-pin header are configured as needed. So yes first you need to add the appropriate DT nodes for sound, codec, etc and then you can use jetson-io to configure the pins. That said you could create your own DT overlay for the rt5639 codec and use jetson-io to apply as described here:

https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fhw_setup_jetson_io.html%23wwpID0E0VB0HA

Regards,
Jon

Hi:

It works. Thanks a lot.

Hi:
I can make my headphone audible thru using the ‘jetson-io’.

And refer to the document, I tried to merge the read-back DTS into my kernel DTS source code.

It’s a big file, and merged DTS file doesn’t not work.

What should I do to set my audio with feature ‘FE-PI Audio Z V2’ + “audo_mclk” + I2S
in my kernel source code of device-tree directly?

Hello!

I would recommend that you create a DT overlay for the rt5639 codec using the jetson-io tool as decribed in the section ‘Creating a Custom Device Tree Overlay for the 40‑pin Header’ …

https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fhw_setup_jetson_io.html%23wwpID0E0VB0HA

I don’t think that you want to use the ‘FE-PI Audio Z V2’ overlay because this uses a completely different codec. If the only pins you need to enable are the ‘aud_mclk’ and ‘i2s’ pins then you can create a base overlay to enable the pins using the following command …

$ sudo /opt/nvidia/jetson-io/config-by-function.py -o dtbo aud_mclk i2s1

Per the above instructions, you can then extract the overlay and add the nodes for the codec.

Regards,
Jon

Hi Jon:

Per your comment,

  1. I create a new dts file “tegra210-jetson-tx1-p2597-2180-a01-devkit-RT5639-overlay.dts”,
    And put it in the folder “\public_sources\hardware\nvidia\platform\t210\jetson\kernel-dts” together with
    “tegra210-jetson-tx1-p2597-2180-a01-devkit-hdr40.dts”.

  2. Modify the makefile to include my new DTS.

And then there’s nothing outouting from the headphone jack.
Makefile.txt (1.56 KB)
tegra210-jetson-tx1-p2597-2180-a01-devkit-RT5639-overlay.dts.txt (2.7 KB)

Hello!

Sorry do you wish to create an overlay for the codec, or just modify the main dts file for TX1 directly?

I was suggesting that you create an overlay because it should be easier to maintain. However, your overlay file, tegra210-jetson-tx1-p2597-2180-a01-devkit-RT5639-overlay.dts, only has the nodes for the pinmux. Is that what you wanted? If so you don’t need to bother adding the overlay as jetson-io can create the dtb for you.

Regards,
Jon

Hi:

My target is to enable the RT5639 in my ‘source code’.

Not a replacement in tegra sink directly.

My problem is
In R32.2.3, I can enable the RT5639 by modifying the pin configuration in U-Boot.
But in R32.3.1, the pin configuration mechanism is changed.
I modified the pin configurations of aud_mclk and I2S pins in the source code, but the sound is
not audible at the headphone path.

By verifying with the ‘jetson-io’, just enabling the mclk and I2S pins, the sound is then audible.

But merge the DTS generated by jetson-io, it is not work.

What should I do for my target?

Hello!

Thanks for the clarification.

So what you can do is …

  1. Make your changes to the TX1 dts file for the rt5639 codec (as you have already done)
  2. Flash the updated DTB file on the target and boot
  3. Run ‘jetson-io’ to enable the I2S and AUD_MCLK pins by executing the following command …
$ sudo /opt/nvidia/jetson-io/config-by-function.py -o dtb aud_mclk i2s1

The above command will update the DTB file with the necessary pin configuration for the AUD_MCLK and I2S1 and on reboot these settings will take effect. Please note that after doing this the /boot/extlinux/extlinux.conf file is also updated to load the newly created DTB file. Please note that the DTB file must be specified via the extlinux.conf file for the pin configuration to take effect.

Regards,
Jon

Hi:

Is the modification able to be inserted to the
‘tegra210-jetson-cv-pinmux-p2597-2180-a00.dtsi’ or
‘tegra210-jetson-cv-base-p2597-2180-a00.dts’ or
…?

I want to maintain the change in my source code directly without modifying the ‘extlinux.conf’, Is it possible?

Hello!

Yes it is possible and in this case, you need to update the tegra210-jetson-cv-pinmux-p2597-2180-a00.dtsi file. You just need to ensure that the I2S1 (DAP1) pins and AUD_MCLK pin are listed under the ‘pinmux_default: common’ node and removed from the ‘pinmux_unused_lowpower: unused_lowpower’ and configured as necessary.

Regards,
Jon

Hi;

Moving the pin configuration from
‘pinmux_unused_lowpower’ to
‘pinmux_default: common’ node’
is not work.

I have to execute ‘sudo /opt/nvidia/jetson-io/config-by-function.py -o dtb aud_mclk i2s1’ to make the sound audible.

Pls see the attachment
original0.dtsi => including the mclk and i2s config.
new.dtsi => based on original0.dtsi + config-by-function.py
new.dtsi.txt (721 KB)
original0.dtsi.txt (718 KB)

Hello,

Yes moving the pin nodes alone will not work. Sorry if I was not clear, but you need to move the pin nodes and update the properties in the nodes to match the values configured by jetson-io. Basically, the I2S1 and AUD_MCLK should have the following values …

diff --git a/kernel-dts/jetson-platforms/tegra210-jetson-cv-pinmux-p2597-2180-a00.dtsi b/kernel-dts/jetson-platforms/tegra210-jetson-cv-pinmux-p2597-2180-a00.dtsi
index 9f2ad9535e09..b9cf4b4f8199 100644
--- a/kernel-dts/jetson-platforms/tegra210-jetson-cv-pinmux-p2597-2180-a00.dtsi
+++ b/kernel-dts/jetson-platforms/tegra210-jetson-cv-pinmux-p2597-2180-a00.dtsi
@@ -28,6 +28,46 @@
 
                pinmux_default: common {
                        /* SFIO Pin Configuration */
+                       aud_mclk_pbb0 {
+                               nvidia,pins = "aud_mclk_pbb0";
+                               nvidia,function = "aud";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       dap1_din_pb1 {
+                               nvidia,pins = "dap1_din_pb1";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       dap1_dout_pb2 {
+                               nvidia,pins = "dap1_dout_pb2";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       dap1_fs_pb0 {
+                               nvidia,pins = "dap1_fs_pb0";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       dap1_sclk_pb3 {
+                               nvidia,pins = "dap1_sclk_pb3";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
                        pk0 {
                                nvidia,pins = "pk0";
                                nvidia,function = "i2s5b";
@@ -1074,14 +1114,6 @@
                };
 
                pinmux_unused_lowpower: unused_lowpower {
-                       aud_mclk_pbb0 {
-                               nvidia,pins = "aud_mclk_pbb0";
-                               nvidia,function = "rsvd1";
-                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                       };
-
                        gpio_x1_aud_pbb3 {
                                nvidia,pins = "gpio_x1_aud_pbb3";
                                nvidia,function = "rsvd0";
@@ -1098,38 +1130,6 @@
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };
 
-                       dap1_din_pb1 {
-                               nvidia,pins = "dap1_din_pb1";
-                               nvidia,function = "rsvd1";
-                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                       };
-
-                       dap1_dout_pb2 {
-                               nvidia,pins = "dap1_dout_pb2";
-                               nvidia,function = "rsvd1";
-                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                       };
-
-                       dap1_fs_pb0 {
-                               nvidia,pins = "dap1_fs_pb0";
-                               nvidia,function = "rsvd1";
-                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                       };
-
-                       dap1_sclk_pb3 {
-                               nvidia,pins = "dap1_sclk_pb3";
-                               nvidia,function = "rsvd1";
-                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                       };
-

Regards,
Jon

Hi:

Thanks, it works.