TX2 configuration gpio function problem

We used TX2 core board and customized our own bottom board. Some GPIO control functions can be used. I checked “Jetson-TX2-Series-Pinmux-Template_v1.04.xlsm” and found that the limited pin does not have a corresponding GPIO number. I want to know that these pins cannot be configured as GPIO functions?
For example, the picture below:

hello qulei159,

all the signals which are coming out of CVM and can be configured as GPIO,
please look into pinmux configuration file,
for example,

pinmux.0x02432018 = 0x00004401; # dmic2_clk_pm3: i2s3, tristate-disable, input-disable
pinmux.0x02432010 = 0x00004441; # dmic2_dat_pm2: i2s3, tristate-disable, input-enable

it’s due to some TX2 signals to be consistent with TX1 modules, it’s supposed to be backward compatible with TX1.
according to pinmux cfg, it indicate the GPIO port after “p”; the numbers means the offset within GPIO port.
so, you may consider those GPIOs as following,
DMIC2_CLK, dmic2_clk_pm3, TEGRA_GPIO(M, 3);
DPAD4_SCLK, dap4_sclk_pcc0, TEGRA_GPIO(CC, 0);

please have modification in device tree, to check whether it works or not.

thinks, Problem has been solved.

There is another question about gpio configuration:
I used the “Jetson-TX2-Series-Pinmux-Template_v1.04.xlsm” file to generate the device tree file, and configure some pins as gpio functions.
I opened the device tree file and found:

ufs0_rst_pbb1 {
nvidia,pins = “ufs0_rst_pbb1”;
nvidia,function = “rsvd1”;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
gpio_pq5_pi5 {
nvidia,pins = “gpio_pq5_pi5”;
nvidia,function = “rsvd0”;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;

nvidia,function = “rsvd0”、“rsvd1”、“rsvd2”, These strings should represent gpio functions。For the pins that cannot be configured as gpio functions in the xlsm above, such as pin-H6 and pin-E6, which character string is used to represent the gpio function?

hello qulei159,

you may keep use that naming as default, please also check below kernel sources for reference,