While trying to update to L4T 32.5.1, while the update works and all user applications don’t have an issue, there is an enormous amount of interrupts being generated on the phy_interrupt line causing CPU0 to be maxed out at 100% at all times.
The .dts file has not changed between the two install version so I’m not sure why there would be so many interrupts. As far as i can tell, the pin phy_interrupt is not even an external pin. Any idea what might be going on?
Hi,
Do you observe the issue on TX2 developer kit or your custom board? By default we have done SQA test on developer kit and it should not happen. Would like to know if it is specific to your custom board.
Hi,
This is specific to our custom board. The Nvidia provided kernel and device-tree works fine on the developer kit. However when using the new kernel with the same device tree, gpio layout, etc, from our previous L4T install, the issue appears on our custom board.
After looking through some forums, I noticed this page Jetson TX2 NX Ethernet Interrupt Pin, which states that the interrupt pin for eth_phy is not actually pin 101 (M.05) but is actually AA.07. We set our pinmux up assuming M.05 is the correct interrupt pin, could this have caused the weird behaviour? We use the TX2 with ethernet SOC, not the TX2-NX SOC, I assume the internal connections are the same but I’d like confirmation.
since it’s customize board, you should apply the Pinmux Changes to change the pinmux configuration applied by the software.
please check pin groups to review the pinmux configuration,
for example, $ sudo cat /sys/kernel/debug/pinctrl/<address>.pinmux/pinconf-groups
thanks