Using GPIO interrupt with sysfs not working (maybe config required?)

[bsp_dev]

Hi,
We use a custom carrier board hosting an Orin NX SoM with JP 5.1.3.

We use gpio-341 (PEE.02) as interrupt source for 1pps signal.
We tested it with sysfs:

1. Exported the GPIO
2. Activated the signal
3. Saw the value is changing between 1 and 0.

The problem is that even after echo rising to the edge file we don’t get an interrupt (tested with c program).

Is there any configuration setup we need to do? something to verify? maybe something’s missing in the device tree (we didn’t make any changes in the dt related to this matter)?
device_tree.txt (424.6 KB)

Thanks

[KevinFFF]

Hi bsp_dev,

Have you configured it as input in pinmux for interrupt usage?
Have you also measured this interrupt from waveform?

You have to configure the device tree about the interrupt for PPS. You can refer to the following topic for details.

AGX Xavier PPS fetch timeout R35.2.1(R32.7.1 works fine)

Hi NV_Team, AGX Xavier using L4T-R32.7.1 works fine with pps, but L4T-R35.2.1 can’t get pps (timeout), please help to check R35.2.1need patch ? dtsi pps { // here use gpio for the pin in which you want pps signal. SYNC_IN gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(A, 0) GPIO_ACTIVE_LOW>; compatible = "pps-gpio"; assert-falling-edge; status = "okay"; }; pps-gpio.c diff --git a/l4t-r35.2.1-jp5.1ga/kernel/kernel-5.10/drivers/pps/clients/pps-gpio.c b/l4t-r35.2.1-jp5.1ga/kernel/ke…

[bsp_dev]

Hi @KevinFFF ,

I get the following error on dmesg:

4.116624] pps-gpio pps_gpio: failed to request PPS GPIO
[ 4.122158] pps-gpio: probe of pps_gpio failed with error -22

I read the instructions and added the following node to the tegra234-soc-base.dtsi:

pps: pps_gpio
{
compatible = “pps-gpio”;
gpios = <&tegra_main_gpio 341 1>;
assert-falling-edge;
status = “okay”;
};

gpio 341 is PEE.02 and its the 1pps input according to PINMUX sheet

[bsp_dev]

I noticed there are two options for gpio setting in the spreadsheet under customer usage:

1. GPIO3_PEE.02
2. GPIO_AO_RET

I used the first one which resulted with “rsvd” value for the nvidia,function property in the ao_n_pee2 dt node.
Than I tried to use the second which resulted with nvidia,function = gpio. I get the same driver error.

I know that PEE.02 is gpio 341 according to /sys/kernel/debug

[KevinFFF]

@bsp_dev

I know that PEE.02 is gpio 341 according to /sys/kernel/debug

It is not mapping like this.
It should be derived from the definition in header file.

Please share the full dmesg and device tree for further check.

[bsp_dev]

device tree:
final_dt.txt (424.6 KB)

target dmesg:
dmesg.txt (63.6 KB)

Thanks @KevinFFF

[KevinFFF]

[    4.123685] pps-gpio pps_gpio: failed to request PPS GPIO
[    4.129222] pps-gpio: probe of pps_gpio failed with error -22

It seems you still stuck at PPS gpio issue.

Please modify the following to configure PPS GPIO for PEE.02.

	pps_gpio {
		compatible = "pps-gpio";
-		gpios = <0x02 0x155 0x01>;
+		gpios = <0x51 0x22 0x01>;
		assert-falling-edge;
		status = "okay";
		phandle = <0x475>;
	};

You can refer to tegra234-gpio.h for the definition.
PEE.02 → 4*8 + 2 = 34 = 0x22

#define TEGRA234_AON_GPIO(port, offset) \
  	((TEGRA234_AON_GPIO_PORT_##port * 8) + offset)

0x51 is the phandle for GPIO AON Controller in your case.

	gpio@c2f0000 {
		compatible = "nvidia,tegra234-gpio-aon";
		..
		phandle = <0x51>;
	};

[bsp_dev]

@KevinFFF , Thank you for your help. I still get the same error.
my dts:
final_dt.txt (424.6 KB)
my boot log:
boot.log (125.6 KB)
my pinmmux and gpio .dtsi for BCTs:
tegra234-mb1-bct-pinmux-p3767-dp-a03.txt (65.8 KB)
Orin-jetson_orin_nx_series_usits-gpio-default.txt (4.0 KB)

[KevinFFF]

Could you share the result of the following command on your board after boot up?

$ sudo cat /sys/kernel/debug/gpio | grep PEE.02

You can also try to configure this node (pps_gpio) in kernel source and re-build kernel image/dtb.

Or use 0x0 as ACTIVE_HIGH instead of 0x01 as ACTIVE_LOW:

	pps_gpio {
		compatible = "pps-gpio";
-		gpios = <0x02 0x155 0x01>;
+		gpios = <0x51 0x22 0x0>;
		assert-falling-edge;
		status = "okay";
		phandle = <0x475>;
	};

Please share the block diagram of your connections of PPS module.

[bsp_dev]

Sorry for the late response.
Block Diagram:

I want to emphasize that my problem is with the interrupt mechanism when utilizing the sysfs.
If I export the gpio and reads its value, I see its toggling between 1 and 0 once our 1pps supplier is active. If I write a c program that waits for this exported gpio’s interrupt - I don’t receive it.

In addition, I get the above error (
4.116624] pps-gpio pps_gpio: failed to request PPS GPIO
[ 4.122158] pps-gpio: probe of pps_gpio failed with error -22
)
when I load the “pps-gpio” kernel driver.

[KevinFFF]

@bsp_dev

4.116624] pps-gpio pps_gpio: failed to request PPS GPIO

Yes, your issue is about that the pps driver can not request the PPS GPIO you specified.
Please add more logs in driver or try to configure pps_gpio from device tree source.

[bsp_dev]

Hi @KevinFFF ,
I found this post:

Failed to request PPS GPIO

It seems no other driver using the pin. Yes, it has been configured as input and should work with PPS signal. You could check pps_gpio_setup() in pps-gpio.c and debug the reason about why i the pin could not be requested in driver.

and indeed compiling the driver as module and load it solved the problem for me:

sudo insmod ./pps-gpio.ko
sudo dmesg
[ 3333.628681] pps_gpio: no symbol version for module_layout
[ 3333.635108] irq: IRQ310: trimming hierarchy from :pmc@c360000
[ 3333.635245] pps pps1: new PPS source pps_gpio.-1
[ 3333.635284] pps pps1: Registered IRQ 310 as PPS source

Now I’m having another problem:
for some reason I don’t see the interrupt mechanism is working.
Maybe you have a way for me to test it or debug it?
Now I have a /dev/pps1 device

[KevinFFF]

It seems you’ve probed the pps-gpio driver successfully.
What do you mean about “interrupt mechanism not working”?

Have you tired runng ppstest to check if your can get the signal?

[kayccc]

Is this still an issue to support? Any result can be shared?

[bsp_dev]

Hi @KevinFFF , @kayccc
Sorry for the late response. Were on holidays vacations (return to work next week).
I executed ppstest on /dev/pps1 (the device file created by the driver) and I get a timeout without a signal recognition.
In addition I asked chatGPT for a userspace program to get the interrupt when the pps signal is recognized and its keep waiting for the interrupt as well.
I generate the pps signal by hand by powering off/on a power supply connected to the gpio pin.

Maybe there is something wrong with my device tree and the interrupt assigned to it?
Some sort of misconfiguration?

Thanks

[KevinFFF]

@bsp_dev

I generate the pps signal by hand by powering off/on a power supply connected to the gpio pin.

Which PIN are you using?
Have you also tried to get a scope to measure the signal?

You can check if there’s any error showing in dmesg or your your application.
Please share the detailed steps how you verify.

[bsp_dev]

Hi @KevinFFF ,
I’m using PEE.02.

1. The Pulse scope image:
   

   

2. Verification 1:
   I use sysfs to identify and export PEE.02 pin. I read its incoming value.
   I toggle by hand the signal generator and see the value is toggling accordingly.
   sysfs.log (7.8 KB)

3. Verification 2:
   I load the pps_gpio as a kernel module.
   I execute pps-test with the new /dev/pps1 device file. Even though I generate the signal, the test fails.
   pps_gpio.log (65.4 KB)

Maybe there is something wrong specific with the interrupt setup?
final_dt.txt (425.3 KB)

Thanks a lot !

[KevinFFF]

	pps_gpio {
		compatible = "pps-gpio";
		gpios = <0x51 0x22 0x00>;
		assert-falling-edge;
		status = "okay";
		phandle = <0x479>;
	};

Please share the source of your device tree instead of the one decompiled from dtb.

[   62.293362] irq: IRQ310: trimming hierarchy from :pmc@c360000
[   62.293696] pps pps1: new PPS source pps_gpio.-1
[   62.293734] pps pps1: Registered IRQ 310 as PPS source

Please also share the result of cat /proc/interrupts from your board.

[bsp_dev]

Hi @KevinFFF ,

pps: pps_gpio
{
compatible = “pps-gpio”;
//gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(A, 0) GPIO_ACTIVE_HIGH>; //not GPIO_ACTIVE_LOW
//gpios = <&tegra_aon_gpio TEGRA234_AON_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
//gpios = <&tegra_main_gpio 341 1>;
//gpios = <0x51 0x22 0x01>;
gpios = <0x51 0x22 0x00>;
assert-falling-edge;
status = “okay”;
};

user@desktop:~$ cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
9: 0 0 0 0 GICv3 25 Level vgic
11: 0 0 0 0 GICv3 30 Level kvm guest ptimer
12: 0 0 0 0 GICv3 27 Level kvm guest vtimer
13: 12312 9629 10969 9384 GICv3 26 Level arch_timer
18: 0 0 0 0 GICv3 255 Level mc_status
20: 0 0 0 0 GICv3 202 Level arm-smmu global fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault
21: 0 0 0 0 GICv3 264 Level arm-smmu global fault, arm-smmu-context-fault
22: 0 0 0 0 GICv3 272 Level arm-smmu global fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault
23: 0 0 0 0 GICv3 270 Level arm-smmu global fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault, arm-smmu-context-fault
24: 0 0 0 0 GICv3 274 Level arm-smmu global fault, arm-smmu-context-fault
25: 0 0 0 0 GICv3 263 Level 13a00000.cbb-fabric
26: 0 0 0 0 GICv3 204 Level c600000.aon-fabric
27: 0 0 0 0 GICv3 206 Level d600000.bpmp-fabric
28: 0 0 0 0 GICv3 413 Level de00000.dce-fabric
29: 0 0 0 0 GICv3 207 Level be00000.rce-fabric
30: 0 0 0 0 GICv3 205 Level b600000.sce-fabric
31: 0 0 0 0 GICv3 368 Level tegra-p2u-intr
32: 0 0 0 0 GICv3 369 Level tegra-p2u-intr
33: 0 0 0 0 GICv3 370 Level tegra-p2u-intr
34: 0 0 0 0 GICv3 371 Level tegra-p2u-intr
35: 0 0 0 0 GICv3 372 Level tegra-p2u-intr
36: 0 0 0 0 GICv3 373 Level tegra-p2u-intr
37: 0 0 0 0 GICv3 374 Level tegra-p2u-intr
38: 0 0 0 0 GICv3 375 Level tegra-p2u-intr
39: 0 0 0 0 GICv3 376 Level tegra-p2u-intr
40: 0 0 0 0 GICv3 377 Level tegra-p2u-intr
41: 0 0 0 0 GICv3 378 Level tegra-p2u-intr
42: 0 0 0 0 GICv3 379 Level tegra-p2u-intr
43: 0 0 0 0 GICv3 380 Level tegra-p2u-intr
44: 0 0 0 0 GICv3 381 Level tegra-p2u-intr
45: 0 0 0 0 GICv3 382 Level tegra-p2u-intr
46: 0 0 0 0 GICv3 383 Level tegra-p2u-intr
47: 0 0 0 0 GICv3 235 Level tegra-p2u-intr
48: 0 0 0 0 GICv3 252 Level tegra-p2u-intr
49: 0 0 0 0 GICv3 253 Level tegra-p2u-intr
50: 0 0 0 0 GICv3 254 Level tegra-p2u-intr
51: 0 0 0 0 GICv3 140 Level tegra-p2u-intr
52: 0 0 0 0 GICv3 141 Level tegra-p2u-intr
53: 0 0 0 0 GICv3 142 Level tegra-p2u-intr
54: 0 0 0 0 GICv3 143 Level tegra-p2u-intr
55: 0 0 0 0 GICv3 77 Level tegra-pcie-intr
57: 0 0 0 0 GICv3 83 Level tegra-pcie-intr, PCIe PME, aerdrv
59: 0 0 0 0 GICv3 386 Level tegra-pcie-intr
61: 0 0 0 0 GICv3 388 Level tegra-pcie-intr, PCIe PME, aerdrv
66: 742 0 0 0 GICv3 317 Level uart-pl011
67: 0 0 0 0 GICv3 152 Level 3c00000.tegra-hsp
68: 0 0 0 0 GICv3 68 Level 3210000.spi
69: 0 0 0 0 GICv3 70 Level 3230000.spi
70: 51 0 0 0 GICv3 57 Level 3160000.i2c
71: 42 0 0 0 GICv3 58 Level c240000.i2c
72: 0 0 0 0 GICv3 59 Level 3180000.i2c
73: 0 0 0 0 GICv3 60 Level 3190000.i2c
74: 0 0 0 0 GICv3 62 Level 31b0000.i2c
75: 0 0 0 0 GICv3 63 Level 31c0000.i2c
76: 0 0 0 0 GICv3 64 Level c250000.i2c
77: 0 0 0 0 GICv3 65 Level 31e0000.i2c
79: 0 0 0 0 GICv3 108 Level gpcdma.0
80: 0 0 0 0 GICv3 109 Level gpcdma.1
81: 0 0 0 0 GICv3 110 Level gpcdma.2
82: 0 0 0 0 GICv3 111 Level gpcdma.3
83: 0 0 0 0 GICv3 112 Level gpcdma.4
84: 0 0 0 0 GICv3 113 Level gpcdma.5
85: 0 0 0 0 GICv3 114 Level gpcdma.6
86: 0 0 0 0 GICv3 115 Level gpcdma.7
87: 0 0 0 0 GICv3 116 Level gpcdma.8
88: 0 0 0 0 GICv3 117 Level gpcdma.9
89: 0 0 0 0 GICv3 118 Level gpcdma.10
90: 0 0 0 0 GICv3 119 Level gpcdma.11
91: 0 0 0 0 GICv3 120 Level gpcdma.12
92: 0 0 0 0 GICv3 121 Level gpcdma.13
93: 0 0 0 0 GICv3 122 Level gpcdma.14
94: 0 0 0 0 GICv3 123 Level gpcdma.15
95: 0 0 0 0 GICv3 124 Level gpcdma.16
96: 0 0 0 0 GICv3 125 Level gpcdma.17
97: 0 0 0 0 GICv3 126 Level gpcdma.18
98: 0 0 0 0 GICv3 127 Level gpcdma.19
112: 1794 0 0 0 GICv3 92 Level snd_hda_tegra
113: 0 0 0 0 GICv3 51 Level bc00000.rtcpu
114: 116 0 0 0 GICv3 242 Level d230000.actmon
115: 0 0 0 0 GICv3 23 Level arm-pmu
116: 0 0 0 0 GICv3 579 Level arm_dsu_0
117: 0 0 0 0 GICv3 580 Level arm_dsu_1
118: 0 0 0 0 GICv3 581 Level arm_dsu_2
119: 0 0 0 0 GICv3 583 Level scf-pmu
120: 0 0 0 0 GICv3 398 Level e860000.psc
121: 0 0 0 0 GICv3 399 Level e860000.psc
122: 0 0 0 0 GICv3 400 Level e860000.psc
123: 0 0 0 0 GICv3 401 Level e860000.psc
124: 0 0 0 0 GICv3 402 Level e860000.psc
125: 0 0 0 0 GICv3 403 Level e860000.psc
126: 0 0 0 0 GICv3 404 Level e860000.psc
127: 0 0 0 0 GICv3 405 Level e860000.psc
128: 543 0 0 0 GICv3 480 Level host_syncpt
129: 0 0 0 0 GICv3 481 Level host_syncpt
130: 0 0 0 0 GICv3 482 Level host_syncpt
131: 0 0 0 0 GICv3 483 Level host_syncpt
132: 0 0 0 0 GICv3 484 Level host_syncpt
133: 0 0 0 0 GICv3 485 Level host_syncpt
134: 0 0 0 0 GICv3 486 Level host_syncpt
135: 0 0 0 0 GICv3 487 Level host_syncpt
136: 0 0 0 0 GICv3 295 Level host_status
137: 0 0 0 0 GICv3 238 Level vic
138: 0 0 0 0 GICv3 260 Level tsec_riscv_irq
139: 0 0 0 0 GICv3 266 Level pva-isr
140: 0 0 0 0 GICv3 464 Level pva-isr
141: 0 0 0 0 GICv3 465 Level pva-isr
142: 0 0 0 0 GICv3 466 Level pva-isr
143: 0 0 0 0 GICv3 467 Level pva-isr
144: 0 0 0 0 GICv3 468 Level pva-isr
145: 0 0 0 0 GICv3 469 Level pva-isr
146: 0 0 0 0 GICv3 470 Level pva-isr
147: 0 0 0 0 GICv3 471 Level pva-isr
148: 0 0 0 0 GICv3 268 Level nvdla0
149: 0 0 0 0 GICv3 269 Level nvdla1
150: 9918 0 0 0 GICv3 165 Level c150000.tegra-hsp
154: 11919 0 0 0 GICv3 208 Level 3c00000.tegra-hsp
162: 1 0 0 0 GICv3 160 Level 3d00000.tegra-hsp
167: 109 0 0 0 GICv3 214 Level b950000.tegra-hsp
171: 0 0 0 0 GICv3 316 Level tegra-se-nvrng
224: 2 0 0 0 GICv3 39 Level 2190000.watchdog
228: 0 0 0 0 GICv3 199 Level 3610000.xhci
229: 0 0 0 0 GICv3 198 Level 3550000.xudc
230: 194 0 0 0 GICv3 195 Level xhci-hcd:usb1
231: 0 0 0 0 GICv3 196 Level 3610000.xhci
232: 0 0 0 0 GICv3 100 Level gk20a_stall
233: 29 0 0 0 GICv3 102 Level gk20a_stall
234: 42 0 0 0 GICv3 103 Level gk20a_stall
235: 0 0 0 0 GICv3 99 Level gk20a_nonstall
236: 0 0 0 0 GICv3 408 Level tegra_dce_isr
237: 767 0 0 0 GICv3 409 Level tegra_dce_isr
245: 0 0 0 0 c360000.pmc 73 Level tegra_rtc
246: 1 0 0 0 c360000.pmc 24 Level nvvrs-pseq-irq
247: 1 0 0 0 nvvrs-pseq-irq 3 Edge rtc-alarm
249: 83 0 0 0 agic-controller 73 Edge
250: 42 0 0 0 agic-controller 64 Edge
252: 41 0 0 0 agic-controller 94 Edge
262: 55 0 0 0 agic-controller 32 Level
263: 53 0 0 0 agic-controller 33 Level
294: 21 0 0 0 MSI 537395200 Edge nvme0q0
295: 3758 0 0 0 MSI 537395201 Edge nvme0q1
296: 0 4468 0 0 MSI 537395202 Edge nvme0q2
297: 0 0 6411 0 MSI 537395203 Edge nvme0q3
298: 0 0 0 6053 MSI 537395204 Edge nvme0q4
299: 0 0 0 0 MSI 537395205 Edge nvme0q5
300: 0 0 0 0 MSI 537395206 Edge nvme0q6
301: 0 0 0 0 MSI 537395207 Edge nvme0q7
302: 0 0 0 0 MSI 537395208 Edge nvme0q8
304: 0 0 0 0 c360000.pmc 83 Edge sw-wake
305: 0 0 0 0 gpio 35 Edge force-recovery
306: 0 0 0 0 gpio 27 Edge power-key
307: 12145 0 0 0 MSI 1074266112 Edge eth0
IPI0: 7657 16178 13183 8458 Rescheduling interrupts
IPI1: 1956 1746 1424 1330 Function call interrupts
IPI2: 0 0 0 0 CPU stop interrupts
IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
IPI4: 0 0 0 0 Timer broadcast interrupts
IPI5: 592 299 389 367 IRQ work interrupts
IPI6: 0 0 0 0 CPU wake-up interrupts
Err: 0

[KevinFFF]

@KevinFFF

[ 62.293734] pps pps1: Registered IRQ 310 as PPS source

Why I can not find IRQ 310 in your /proc/interrupts result?