Using Orin NX PP.06 GPIO as 3.3V output with external pullup

Hi there,

I would like to use pin GPIO3_PP.06 as a 3.3V logic output to perform external frame triggering (on falling edges). Although I could use a level shifter design, I wanted to explore using a simpler 3.3V pullup and using the pin in open-drain to pull the line low. I configured the pin as such in the DTSI file:

			soc_gpio25_pp6 {
				nvidia,pins = "soc_gpio25_pp6";
				nvidia,function = "vi0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

But had some confusion as this doesn’t seem to have the desired effect. From the following threads:

it wasn’t clear whether to use the pin in this way what the correct values should be for:

  • tristate
  • enable-input
  • io-high-voltage

From the following thread: Jao: pinmux tristate for passthrough it appears that tristate is only applicable for input pins, thus if we use the pin as an output we should set it to disable.

I understand open-drain to be an output mode although my background is software and not electronics so please correct me if I’m wrong. Thus we should set enable input to disable.

And for io-high-voltage we ideally should enable so the pin is 3.3V tolerant. I want to confirm that this option is compatible with setting the pin as an output to create an open-drain pin.

In addition, is it right that the current limit for this pin is <20 uA, i.e. at 3.3V the pull-up resistor should be > ~170kOhm when draining?

Thank you in advance for help with this clarification.
Nabeel

Hi Nabeel,

Are you using the devkit or custom board for Orin NX?
What’s the Jetpack version in use?

Please use pinmux spreadsheet to configure them since it would generate not only pinmux dtsi but also gpio dtsi. I think they are necessary to use the pin as output.

Pinmux spreadsheet would handle for them and you could get those info in Column AG to AL.

Hi Kevin,

Thanks for the response! This is a custom carrier for the Orin NX 16GB but the GPIO functions are unchanged and passed through directly. I’m using Jetpack 6.2.

I tried using the pinmux spreadsheet to generate as you suggested and it gave me an even stranger output. When configuring the pin for “Pin Direction” : “Open-Drain” the output DTSI configured the pin as an input.

image

			soc_gpio25_pp6 {
				nvidia,pins = "soc_gpio25_pp6";
				nvidia,function = "vi0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

Interestingly, I got the nvidia,open-drain option which I did not know existed. But now I’m also not sure what the correct value for this should be.

I am trying to test the pin as such: gpioset --mode=wait --drive=open-drain gpiochip0 98=0. The 98 is the pin offset obtained from gpioinfo | grep "PP.06". With a 3.3V external pullup wired through a 20K resistor I’m unable to drive the pin to drain and get a logic low. Nothing happens when I run the above gpioset command. Would you be able to confirm that I’ve configured the pin correctly for my use case in the pinmux spreadsheet?

Thank you,
Nabeel

For further guidance, please refer to Jetson AGX Series Module Pinmux Application Note available through search in Jetson Download Center | NVIDIA Developer

Also, for applying pinmux changes refer to Jetson Orin NX and Nano Series — Jetson Linux Developer Guide documentation

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