I am using Jetpack 4.2 with Tx2i. I am trying to access uart2. I have been using uart 1 with ttyTHS2 which was working fine.
Currently ls /dev/tty* is displaying
ttyTHS1,ttyTHS2 and ttyTHS3. It means that the uarts are enabled in dtb but i am not able to receive or send anything using minicom.
I am not familiar with some of the differences of the TX2i, but in general, ttyTHS2 is routed to J17 on the development kit carrier board. Default settings there are 115200 8N1. I think by default CTS/RTS flow control is not used. If this is not the development kit carrier board, then the device tree would need to be altered.
Hello,
Its a custom board, I know Uart 1 is at ttyTHS2. But i am trying to use uart2. I am using the same dtb as of dev kit . I can see all three uarts are present by /dev/tty*.
This is my current DTB settings.
uarta = “/serial@3100000”;
uartb = “/serial@3110000”;
uartc = “/serial@c280000”;
uartd = “/serial@3130000”;
serial0 = “/serial@3100000”;
serial1 = “/serial@3110000”;
serial2 = “/serial@c280000”;
serial3 = “/serial@3130000”;
serial@c280000 {
compatible = “nvidia,tegra186-hsuart”;
iommus = <0x11 0x20>;
reg = <0x0 0xc280000 0x0 0x40>;
reg-shift = <0x2>;
interrupts = <0x0 0x72 0x4>;
nvidia,memory-clients = <0xe>;
dmas = <0x25 0x3 0x25 0x3>;
dma-names = “rx”, “tx”;
clocks = <0x10 0xd7 0x10 0x10d>;
clock-names = “serial”, “parent”;
resets = <0x10 0x31>;
reset-names = “serial”;
status = “okay”;
nvidia,tolerance-low-range = <0x0>;
nvidia,tolerance-high-range = <0x4>;
nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
linux,phandle = <0x18d>;
phandle = <0x18d>;
};
On inspection this corresponds to ttyTHS2.
I won’t be able to help with the specific device tree setup on a custom carrier, but what you’ve provided should be enough for someone with experience on that topic for the TX2i. It is very likely that edits to this will do what you need.