Debug port Uart2 is not working

[sateeshargus]

I am checking the dts files and trying to understand whether Uart2 enabled or disabled.
Board details: JETSON TX2I
Jetpack: 4.6.3

Regards,
Sateesh

[KevinFFF]

Hi sateeshargus,

Are you using the devkit or custom board for TX2?

Have you refer to the following instruction for serial console log?
Serial Console - NVIDIA Jetson TX2 - JetsonHacks

Please also provide the dtb in use for further check.

[sateeshargus]

Thanks@kevinFFF.

I am using jetson TX2i devkit.
Provided link is not working.
tegra186-quill-p3310-1000-a00-00-base.dtb (365.7 KB)

[KevinFFF]

@sateeshargus

Provided link is not working.

Do you mean the link can not be opened?
Or it could not work on your devkit? Which step you get any error?

From your dtb, UART2(uartb) has been enabled correctly.

uartb = "/serial@3110000";

	serial@3110000 {
		compatible = "nvidia,tegra186-hsuart";
		iommus = <0x11 0x20>;
		reg = <0x0 0x3110000 0x0 0x40>;
		reg-shift = <0x2>;
		interrupts = <0x0 0x71 0x4>;
		nvidia,memory-clients = <0xe>;
		dmas = <0x24 0x9 0x24 0x9>;
		dma-names = "rx", "tx";
		clocks = <0x10 0x38 0x10 0x10d>;
		clock-names = "serial", "parent";
		resets = <0x10 0x30>;
		reset-names = "serial";
		status = "okay";
		nvidia,tolerance-low-range = <0x0>;
		nvidia,tolerance-high-range = <0x4>;
		nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
		linux,phandle = <0x195>;
		phandle = <0x195>;
	};

For debug UART, it seems using UART1(uarta) on 40-pin expansion header.

[sateeshargus]

Thanks@kevinFFF.

Now the debug port is working fine. Some cabling issue. Cable was not connected properly.

Now I am working on the developing the device drivers. I need to write driver for other UARTs. where I need to implement the source code.

[KevinFFF]

It’s great to hear this.