What number is the "GPIO3_PC.00" spi port at TX1 r28.2?

Autonomous Machines Jetson & Embedded Systems Jetson TX1
1

What number is the “GPIO3_PC.00” spi port at TX1 r28.2?
SPI0?
SPI1?

SPI1_MOSI	F13	SPI1_MOSI	unused_SPI1_MOSI	GPIO3_PC.00
SPI1_MISO	F14	SPI1_MISO	unused_SPI1_MISO	GPIO3_PC.01
SPI1_CLK	G13	SPI1_SCK	unused_SPI1_SCK	        GPIO3_PC.02
SPI1_CS0#	E14	SPI1_CS0	unused_SPI1_CS0	        GPIO3_PC.03
SPI1_CS1#	E13	SPI1_CS1	unused_SPI1_CS1	        GPIO3_PC.04
2

hello sensor_test,

are you asking the GPIO numbers of GPIO3_PC.00?
you may following the formula for calculation, thanks

<top>/kernel/kernel-4.4/include/dt-bindings/gpio/tegra-gpio.h


#define TEGRA_GPIO(bank, offset) \
	((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)
3

I asking which SPI numbers of GPIO3_PC.00,GPIO3_PC.01,GPIO3_PC.02,GPIO3_PC.03,GPIO3_PC.04?
SPI0?
SPI1?

4

hello sensor_test,

it’s SPI1, you should also refer to Jetson TX1 Module Pinmux from Jetson Download Center,
thanks

5

Please see my dtsi file define is OK?

I MUST chanage the “spidev0_0” the “spidev1_0”,and change the “spidev0_1” the “spidev1_1”?is RIGHT?

/ {
	gpio@6000d000 {
	    gpio_default: default {
		   gpio-hog;
           function;
           gpios = <TEGRA_GPIO(C, 0) 0 TEGRA_GPIO(C, 1) 0 TEGRA_GPIO(C, 2) 0 TEGRA_GPIO(C, 3) TEGRA_GPIO(C,4) 0>;
	    };
    };

	
	/* J21 Header SPI1 */
	/* Note the difference in numbering between the connector and device */
    spi@7000d400 {
    	status = "okay";
    	
    	spidev0_0 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "linux,spidev", "spidev";
			status = "okay";
			reg = <0x0>;
			spi-max-frequency = <40000000>;
			nvidia,enable-hw-based-cs;
			nvidia,cs-setup-clk-count = <0x1e>;
			nvidia,cs-hold-clk-count = <0x1e>;
			nvidia,rx-clk-tap-delay = <0x1f>;
			nvidia,tx-clk-tap-delay = <0x0>;
	    };
	    
	    spidev0_1 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "linux,spidev", "spidev";
			status = "okay";
			reg = <0x1>;
			spi-max-frequency = <40000000>;  /* <20000000>;  */
			nvidia,enable-hw-based-cs;
			nvidia,cs-setup-clk-count = <0x1e>;
			nvidia,cs-hold-clk-count = <0x1e>;
			nvidia,rx-clk-tap-delay = <0x1f>;
			nvidia,tx-clk-tap-delay = <0x0>;
	    };
    };

};