Hi,
Is Jestson J21 SPI1 spidev0 or spidev1?
From pinmux data, Jestson SPI1 connects J21 SPI1 ( pin 24, 26, 19, 21, 23),
however we found J21 SPI1 is spidev0 not spidev1 on Tx1 after we enabled SPI.
a. Is this a name discrepancy or our patch issue? (See the patch below)
b. What Jetson TX1 pin SPI2 or SPI0 refers to? (Jetson Tx1 pin SPI2–> spidev1, Jetson Tx1 pin SPI0 – spidev2)
diff --git a/arch/arm64/boot/dts/tegra210-jetson-cv-base-p2597-2180-a00.dts b/arch/arm64/boot/dts/tegra210-jetson-cv-base-p2597-2180-a00.dts
index 2a8f8f38…604b1bc 100644
— a/arch/arm64/boot/dts/tegra210-jetson-cv-base-p2597-2180-a00.dts
+++ b/arch/arm64/boot/dts/tegra210-jetson-cv-base-p2597-2180-a00.dts
@@ -270,14 +270,94 @@
status = “okay”;
};
- spi@7000da00 {
-
status = "ok";
-
gpio@6000d000 {
-
gpio_default: default {
-
gpio-to-sfio = <16 17 18 19 20>;
-
};
};
-
spi@7000d400 {
-
compatible = "nvidia,tegra210-spi";
-
reg = <0x0 0x7000d400 0x0 0x200>;
-
interrupts = <0 59 0x04>;
-
nvidia,dma-request-selector = <&apbdma 15>;
-
iommus = <&smmu TEGRA_SWGROUP_PPCS>;
-
#address-cells = <1>;
-
#size-cells = <0>;
-
clocks = <&tegra_car 41>; status = "okay";
-
dmas = <&apbdma 15>, <&apbdma 15>;
-
dma-names = "rx", "tx";
-
nvidia,clk-parents = "pll_p", "clk_m";
-
spi-spidev@0 {
-
status = "okay";
-
#address-cells = <0x1>;
-
#size-cells = <0x0>;
-
compatible = "linux,spidev", "spidev";
-
reg = <0>;
-
spi-max-frequency = <16000000>;
-
spi-cpha;
-
controller-data {
-
nvidia,enable-hw-based-cs;
-
nvidia,cs-setup-clk-count = <0x1e>;
-
nvidia,cs-hold-clk-count = <0x1e>;
-
nvidia,rx-clk-tap-delay = <0x1f>;
-
nvidia,tx-clk-tap-delay = <0x0>;
-
nvidia,default-chipselect;
-
nvidia,chipselect-gpio = <&gpio 19 0>;
-
};
-
};
-
};
-
spi@7000d600 {
-
compatible = "nvidia,tegra210-spi";
-
reg = <0x0 0x7000d600 0x0 0x200>;
-
interrupts = <0 82 0x04>;
-
nvidia,dma-request-selector = <&apbdma 16>;
-
iommus = <&smmu TEGRA_SWGROUP_PPCS>;
-
#address-cells = <1>;
-
#size-cells = <0>;
-
clocks = <&tegra_car 44>;
-
status = "okay";
-
dmas = <&apbdma 16>, <&apbdma 16>;
-
dma-names = "rx", "tx";
-
nvidia,clk-parents = "pll_p", "clk_m";
-
spi1_0 {
-
#address-cells = <0x1>;
-
#size-cells = <0x0>;
-
compatible = "spidev";
-
reg = <0x0>;
-
spi-max-frequency = <0x17d7840>;
-
nvidia,enable-hw-based-cs;
-
nvidia,cs-setup-clk-count = <0x1e>;
-
nvidia,cs-hold-clk-count = <0x1e>;
-
nvidia,rx-clk-tap-delay = <0x1f>;
-
nvidia,tx-clk-tap-delay = <0x0>;
-
};
-
};