I am trying to add support via device tree for a custom spi device which utilizes the platform driver system.
Currently I have it fully working on SPI 3 CS 0 but I am unable to enable CS1 at all either using a spidev node or changing the reg value from <0x0> to <0x1>.
Here is the SPI node I am working with, the following works fully with my custom node and driver as spi3.0. spi3.1 spidev fails to toggle CS1 at any point even though it is present in/dev/spi3.1. Its default state after boot should be high like CS0.
I have tried swapping the reg values which results in spidev being spi3.0 with CS0 functioning correctly and my custom driver being loaded as spi3.1 but CS1 is still always low.
spi3: spi@3240000 {
compatible = "nvidia,tegra186-spi";
reg = <0x0 0x03240000 0x0 0x10000>;
interrupts = <0 39 0x04>;
nvidia,dma-request-selector = <&gpcdma 18>;
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
dmas = <&gpcdma 18>, <&gpcdma 18>;
dma-names = "rx", "tx";
nvidia,clk-parents = "pll_p", "clk_m";
clocks = <&tegra_car TEGRA186_CLK_SPI4>,
<&tegra_car TEGRA186_CLK_PLLP_OUT0>,
<&tegra_car TEGRA186_CLK_CLK_M>;
clock-names = "spi", "pll_p", "clk_m";
resets = <&tegra_car TEGRA186_RESET_SPI4>;
reset-names = "spi";
status = "disabled";
lepton3@0 {
compatible = "flir,lepton3";
reg = <0x0>;
spi-max-frequency = <17000000>;
spi-cpol = <1>;
spi-cpha = <1>;
lepton-sync-gpio = <TEGRA_MAIN_GPIO(J,5)>;
lepton-i2c-bus = <1>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x3>;
nvidia,cs-hold-clk-count = <0x3>;
nvidia,rx-clk-tap-delay = <0x0>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
spi@1 {
compatible = "spidev";
reg = <0x1>;
spi-max-frequency = <18000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x3>;
nvidia,cs-hold-clk-count = <0x3>;
nvidia,rx-clk-tap-delay = <0x0>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
};
};