TX2 adds cs gpios for spiderv3.1

I know that the 26 pins on the 40PIN extension pin of the TX2 are invalid. I have enabled spiderv3.0 and 3.1 through the jetson io. Now I want to use 12 pins (DAP1_SCLK) as my spiderv3.1 software chip selection, but I want to decompile the device tree file, tegra186-quill-p33100-1000-c03-00-base.dtb, on the host computer Add cs gpios=<&tegra_main_ gpio TEGRA194_ MAIN_ GPIO (J, 0)>, I use dtc - I dts - O dtb - o tegra186-quill-p33100-1000-c03-00-base dtb Extracted. An error occurred while compiling dts. An error is reported as follows. Someone can tell me to add it correctly

The following is the device tree I modified

	spi@3240000 {
		compatible = "nvidia,tegra186-spi";
		reg = <0x0 0x3240000 0x0 0x10000>;
		interrupts = <0x0 0x27 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		cs-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(J,0)>;
		iommus = <0x11 0x20>;
		dmas = <0x25 0x12 0x25 0x12>;
		dma-names = "rx", "tx";
		nvidia,clk-parents = "pll_p", "clk_m";
		clocks = <0x10 0x4a 0x10 0x10d 0x10 0x261>;
		clock-names = "spi", "pll_p", "clk_m";
		resets = <0x10 0x2b>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0x18d>;
		phandle = <0x18d>;

		spi@0 {
			compatible = "tegra-spidev";
			reg = <0x0>;
			spi-max-frequency = <0x1f78a40>;

			controller-data {
				nvidia,rx-clk-tap-delay = <0x8>;
				nvidia,tx-clk-tap-delay = <0x16>;

		spi@1 {
			compatible = "tegra-spidev";
			reg = <0x1>;
			spi-max-frequency = <0x1f78a40>;

			controller-data {

				nvidia,rx-clk-tap-delay = <0x8>;
				nvidia,tx-clk-tap-delay = <0x16>;

You need to expand the TEGRA194_ MAIN_ GPIO() macro for dtc.
Have check below for the define.

I opened the tegra194-gpio.h you said H, I think I defined it as required

Can you tell me how to modify the device tree so that the 12 pins in the 40pin can be used as the chip selection port of my spidev3.1?

I would suggest to download the kernel source to build it instead of using dtc.

What does it mean to download the kernel file for compilation? Is it to use other tools to compile my DTS files on my host instead of using DTC tools? I always compile the device tree on my host. What kind of tool is that? I’m not sure whether my device tree file has errors. I hope you can give me a more detailed guidance, thank you!

I’m looking forward to your reply

Check below for build the kernel and device tree.


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