We had to upgrade from 21.3 to 21.7 due to our new camera. But the chip select seems to misbehave, when analyzing the analog cs signal it slowly drops - see:
Thank you for your answer. I already applied the patch from your post to the code. I’m not sure if that was what you’re referring to. I don’t know what to set nvidia,clk-delay-between-packets to or nvidia,chipselect-gpio for that matter. Can you provide a bit more guidance? I played with the nvidia,clk-delay-between-packets a little, but it didn’t seem to have an effect at all.
The problem just is that the chip-select enable, that is, going from 1.8V to 0V is going too slow. The message is already being transfered while the chip-select is still not ready as can be seen https://i.imgur.com/anM8h3K.png. I wonder how parameters can fix this?
That seems to give an immediate syntax error when compiling with dtc:
Error: /boot/tegra124-jetson_tk1-pm375-000-c00-00.dts:2470.39-40 syntax error
FATAL ERROR: Unable to parse input tree
In general where is this documented? /usr/src/kernel/Documentation/devicetree/bindings/spi/nvidia,spi-tegra114.txt doesn’t specify this very precise, or I’m just to inexperienced.
edit:
ah this is supposed to go into the dtsi file. I still can’t get it to work properly though :( the chipselect is still discharging too slow. How can I figure out the correct bank and offset?
Yeah I understand, but my question is: What is the formula to go from TEGRA_GPIO(x,y) to physical pin? So what should x and y be for e.g. pin 6 on J3A1 at Jetson/GPIO - eLinux.org