Hello Andrew,
- Yes I am using MIPI/CSI. CSI2-2Lane to be specific.
- I made the driver in correlation with the register table configuration.
- IMX568 was on CAM1-2 so I can say yes?
- I had 3 modes defined and I would get this on mode 1 and mode 2. I wouldn’t get any feed from camera on mode 0. They are defined like this:
mode0 {
// mode IMX568_MODE_2472X2064_10BIT_41FPS_2LANE_1188MBPS
mclk_khz = "37125";
num_lanes = "2";
tegra_sinterface = "serial_c";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "10";
csi_pixel_bit_depth = "10";
mode_type = "bayer";
pixel_phase = "rggb"; // gbrg rggb bggr grbg
active_w = "2472";
active_h = "2064";
readout_orientation = "0";
line_length = "810"; //HMAX - 32A
inherent_gain = "1";
pix_clk_hz = "237600000";
gain_factor = "10";
min_gain_val = "0";
max_gain_val = "300";
step_gain_val = "3";
default_gain = "0";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
framerate_factor = "1";
min_framerate = "5";
max_framerate = "41";
step_framerate = "1";
default_framerate = "41";
exposure_factor = "1000000";
min_exp_time = "15";
max_exp_time = "23520";
step_exp_time = "1";
default_exp_time = "12000";
embedded_metadata_height = "1";
};
mode1 {
// mode IMX568_MODE_2472X2064_10BIT_30FPS_2LANE_891MBPS
mclk_khz = "37125";
num_lanes = "2";
tegra_sinterface = "serial_c";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "10";
csi_pixel_bit_depth = "10";
mode_type = "bayer";
pixel_phase = "rggb"; // gbrg rggb bggr grbg
active_w = "2472";
active_h = "2064";
readout_orientation = "0";
line_length = "1074"; //HMAX - 432h
inherent_gain = "1";
pix_clk_hz = "178200000";
gain_factor = "10";
min_gain_val = "0";
max_gain_val = "300";
step_gain_val = "3";
default_gain = "0";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
framerate_factor = "1";
min_framerate = "5";
max_framerate = "30";
step_framerate = "1";
default_framerate = "30";
exposure_factor = "1000000";
min_exp_time = "20";
max_exp_time = "33050";
step_exp_time = "1";
default_exp_time = "12000";
embedded_metadata_height = "1";
};
mode2 {
// mode IMX568_MODE_2472X2064_10BIT_20FPS_2LANE_594MBPS
mclk_khz = "37125";
num_lanes = "2";
tegra_sinterface = "serial_c";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "10";
csi_pixel_bit_depth = "10";
mode_type = "bayer";
pixel_phase = "rggb"; // gbrg rggb bggr grbg
active_w = "2472";
active_h = "2064";
readout_orientation = "0";
line_length = "1588"; //HMAX - 634h
inherent_gain = "1";
pix_clk_hz = "118800000";
gain_factor = "10";
min_gain_val = "0";
max_gain_val = "300";
step_gain_val = "3";
default_gain = "0";
min_hdr_ratio = "1";
max_hdr_ratio = "1";
framerate_factor = "1";
min_framerate = "5";
max_framerate = "20";
step_framerate = "1";
default_framerate = "20";
exposure_factor = "1000000";
min_exp_time = "25";
max_exp_time = "46460";
step_exp_time = "1";
default_exp_time = "15000";
embedded_metadata_height = "1";
};
static imx568_reg imx568_2472x2064_10bit_41fps_2lane_1188mbps[] = {
{0x3014, 0x05}, //INCKSEL_ST0 - INCK = 37.125 MHZ - 05h
{0x3015, 0x91}, //INCKSEL_ST1 - INCK = 37.125 MHZ - 91h
{0x3016, 0x50}, //INCKSEL_ST2 - INCK = 37.125 MHZ - 50h
{0x3018, 0x20}, //INCKSEL_ST3 - INCK = 37.125 MHZ - 20h
{0x3019, 0x02}, //INCKSEL_ST4 - INCK = 37.125 MHZ - 02h
{0x301B, 0x1D}, //INCKSEL_ST5 - INCK = 37.125 MHZ - 1Dh
{0x303C, 0x00}, //HVMODE - Drive mode setting of H/V direction - 0h: All-pixel
{0x30D0, 0xA8}, //VOPB_VBLK_HWIDTH - All Configs - 09A8h
{0x30D1, 0x09}, //
{0x30D2, 0xA8}, //FINFO_HWIDTH - All Configs - 09A8h
{0x30D3, 0x09}, //
{0x30D4, 0x84}, //VMAX - 1188mbps - 0008(84)h
{0x30D5, 0x08}, //VMAX - 1188mbps - 00(08)84h
{0x30D6, 0x00}, //VMAX - 1188mbps - (00)0884h
{0x30D8, 0x2A}, //HMAX - 1188mbps - 03(2A)h
{0x30D9, 0x03}, //HMAX - 1188mbps - (03)2Ah
{0x30E2, 0x04}, //GMRWT - 1188mbps - 04h
{0x30E3, 0x12}, //GMTWT - 1188mbps - 12h
{0x30E5, 0x02}, //GAINDLY - All Configs - 02h
{0x30E6, 0x08}, //GSDLY - 1188mbps - 08h
{0x3200, 0x00}, //ADBIT - 10bit - 0h
{0x321C, 0x40}, //INCKSEL_N0 - 37.125MHz - 40h
{0x321D, 0x05}, //INCKSEL_N1 - All Configs - 05h
{0x321E, 0xE0}, //INCKSEL_N2 - 37.125MHz - E0h
{0x321F, 0x00}, //INCKSEL_N3 - 37.125MHz - 00h
{0x3224, 0x40}, //INCKSEL_D0 - 37.125MHz - 40h
{0x3225, 0x14}, //INCKSEL_D1 - All Configs - 14h
{0x3226, 0x80}, //INCKSEL_D2 - 37.125MHz&1188mbps! - 80h
{0x3227, 0x80}, //INCKSEL_D3 - 1188mbps - 80h
{0x323C, 0x19}, //LLBLANK - All Configs - 19h // VINT_EN register has been squeezed in for the first two bits of 323E
{0x323D, 0x00}, // // Set first two bits for VINT_EN, rest for LLBLANK. LLBLANK needs 0Ch.
{0x323E, 0x30}, // // 0 0 1 1 0 0 / 0 0 --> Can't touch first two, leaves us with 0x30.
{0x3430, 0x00}, //ODBIT - 10 bit - 0h
{0x3521, 0xED}, //??? - All Configs (?) - EDh // Check "Readout Mode" in datasheet
{0x3546, 0x3B}, //??? - All Configs (?) - 3Bh // Check "Readout Mode" in datasheet
{0x35B4, 0x3C}, //BLKLEVEL - 10 bit - 3Ch
{0x35B5, 0x00}, //
{0x3904, 0x03}, //LANESEL - 2-Lane - 03h
{0x3CA4, 0x80}, //TXCLKESC_FREQ - 37.125MHz - 09(80)h
{0x3CA5, 0x09}, //TXCLKESC_FREQ - 37.125MHz - (09)80h
{0x3CB4, 0x4F}, //THS_PREPARE - 1188mbps - 00(4F)h
{0x3CB5, 0x00}, //THS_PREPARE - 1188mbps - (00)4Fh
{0x3CB6, 0x8F}, //TCLK_POST - 1188mbps - 00(8F)h
{0x3CB7, 0x00}, //TCLK_POST - 1188mbps - (00)8Fh
{0x3CB8, 0x4F}, //THS_TRAIL - 1188mbps - 00(4F)h
{0x3CB9, 0x00}, //THS_TRAIL - 1188mbps - (00)4Fh
{0x3CBA, 0x87}, //THS_ZERO - 1188mbps - 00(87)h
{0x3CBB, 0x00}, //THS_ZERO - 1188mbps - (00)87h
{0x3CBC, 0x4F}, //TCLK_PREPARE- 1188mbps - 00(4F)h
{0x3CBD, 0x00}, //TCLK_PREPARE- 1188mbps - (00)4Fh
{0x3CBE, 0x47}, //TCLK_TRAIL - 1188mbps - 00(47)h
{0x3CBF, 0x00}, //TCLK_TRAIL - 1188mbps - (00)47h
{0x3CC0, 0x3F}, //TLPX - 1188mbps - 00(3F)h
{0x3CC1, 0x00}, //TLPX - 1188mbps - (00)3Fh
{0x3CC2, 0x37}, //TCLK_ZERO - 1188mbps - 01(37)h
{0x3CC3, 0x01}, //TCLK_ZERO - 1188mbps - (01)37h
{0x3CC4, 0x0F}, //TCLK_PRE - 1188mbps - 00(0F)h
{0x3CC5, 0x00}, //TCLK_PRE - 1188mbps - (00)0Fh
{0x3CC6, 0x7F}, //THS_EXIT - 1188mbps - 00(7F)h
{0x3CC7, 0x00}, //THS_EXIT - 1188mbps - (00)7Fh
{0x3436, 0x00}, //TOUT0 pin setting 0h: Low fixed
common_mass,
/* {0x3240, 0x29}, //SHS !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
{0x3241, 0x0C},
{0x3242, 0x00}, */
{0x3502, 0x09}, //GAIN_RTS 9 - gain reflect at the next frame
{IMX568_TABLE_END, 0x00}
};
static imx568_reg imx568_2472x2064_10bit_30fps_2lane_891mbps[] = {
{0x3014, 0x05}, //INCKSEL_ST0 - INCK = 37.125 MHZ - 05h
{0x3015, 0x91}, //INCKSEL_ST1 - INCK = 37.125 MHZ - 91h
{0x3016, 0x50}, //INCKSEL_ST2 - INCK = 37.125 MHZ - 50h
{0x3018, 0x20}, //INCKSEL_ST3 - INCK = 37.125 MHZ - 20h
{0x3019, 0x02}, //INCKSEL_ST4 - INCK = 37.125 MHZ - 02h
{0x301B, 0x1D}, //INCKSEL_ST5 - INCK = 37.125 MHZ - 1Dh
{0x303C, 0x00}, //HVMODE - Drive mode setting of H/V direction - 0h: All-pixel
{0x30D0, 0xA8}, //VOPB_VBLK_HWIDTH - All Configs - 09A8h
{0x30D1, 0x09}, //
{0x30D2, 0xA8}, //FINFO_HWIDTH - All Configs - 09A8h
{0x30D3, 0x09}, //
{0x30D4, 0x7C}, //VMAX - 891mbps - 0008(7C)h
{0x30D5, 0x08}, //VMAX - 891mbps - 00(08)7Ch
{0x30D6, 0x00}, //VMAX - 891mbps - (00)087Ch
{0x30D8, 0x32}, //HMAX - 891mbps - 04(32)h
{0x30D9, 0x04}, //HMAX - 891mbps - (04)32h
{0x30E2, 0x02}, //GMRWT - 891mbps - 02h
{0x30E3, 0x0E}, //GMTWT - 891mbps - 0Eh
{0x30E6, 0x06}, //GSDLY - 891mbps - 06h
{0x3200, 0x00}, //ADBIT - 10bit - 0h
{0x321C, 0x40}, //INCKSEL_N0 - 37.125MHz - 40h
{0x321D, 0x05}, //INCKSEL_N1 - All Configs - 05h
{0x321E, 0xE0}, //INCKSEL_N2 - 37.125MHz - E0h
{0x321F, 0x00}, //INCKSEL_N3 - 37.125MHz - 00h
{0x3224, 0x40}, //INCKSEL_D0 - 37.125MHz - 40h
{0x3225, 0x14}, //INCKSEL_D1 - All Configs - 14h
{0x3226, 0xC0}, //INCKSEL_D2 - 37.125MHz&891mbps! - C0h
{0x3227, 0xD0}, //INCKSEL_D3 - 891mbps - D0h
{0x323C, 0x19}, //LLBLANK - All Configs - 19h // VINT_EN register has been squeezed in for the first two bits of 323E
{0x323D, 0x00}, // // Set first two bits for VINT_EN, rest for LLBLANK. LLBLANK needs 0Ch.
{0x323E, 0x30}, // // 0 0 1 1 0 0 / 0 0 --> Can't touch first two, leaves us with 0x30.
{0x3430, 0x00}, //ODBIT - 10 bit - 0h
{0x3521, 0xED}, //??? - All Configs (?) - EDh // Check "Readout Mode" in datasheet
{0x3546, 0x3B}, //??? - All Configs (?) - 3Bh // Check "Readout Mode" in datasheet
{0x35B4, 0x3C}, //BLKLEVEL - 10 bit - 3Ch
{0x35B5, 0x00}, //
{0x3904, 0x03}, //LANESEL - 2-Lane - 03h
{0x3CA4, 0x80}, //TXCLKESC_FREQ - 37.125MHz - 09(80)h
{0x3CA5, 0x09}, //TXCLKESC_FREQ - 37.125MHz - (09)80h
{0x3CB4, 0x3F}, //THS_PREPARE - 891mbps - 00(3F)h
{0x3CB5, 0x00}, //THS_PREPARE - 891mbps - (00)3Fh
{0x3CB6, 0x7F}, //TCLK_POST - 891mbps - 00(7F)h
{0x3CB7, 0x00}, //TCLK_POST - 891mbps - (00)7Fh
{0x3CB8, 0x3F}, //THS_TRAIL - 891mbps - 00(3F)h
{0x3CB9, 0x00}, //THS_TRAIL - 891mbps - (00)3Fh
{0x3CBA, 0x6F}, //THS_ZERO - 891mbps - 00(6F)h
{0x3CBB, 0x00}, //THS_ZERO - 891mbps - (00)6Fh
{0x3CBC, 0x37}, //TCLK_PREPARE- 891mbps - 00(37)h
{0x3CBD, 0x00}, //TCLK_PREPARE- 891mbps - (00)37h
{0x3CBE, 0x37}, //TCLK_TRAIL - 891mbps - 00(37)h
{0x3CBF, 0x00}, //TCLK_TRAIL - 891mbps - (00)37h
{0x3CC0, 0x2F}, //TLPX - 891mbps - 00(2F)h
{0x3CC1, 0x00}, //TLPX - 891mbps - (00)2Fh
{0x3CC2, 0xF7}, //TCLK_ZERO - 891mbps - 00(F7)h
{0x3CC3, 0x00}, //TCLK_ZERO - 891mbps - (00)F7h
{0x3CC4, 0x0F}, //TCLK_PRE - 891mbps - 00(0F)h
{0x3CC5, 0x00}, //TCLK_PRE - 891mbps - (00)0Fh
{0x3CC6, 0x5F}, //THS_EXIT - 891mbps - 00(5F)h
{0x3CC7, 0x00}, //THS_EXIT - 891mbps - (00)5Fh
{0x3436, 0x00}, //TOUT0 pin setting 0h: Low fixed
common_mass,
/* {0x3240, 0x29}, //SHS !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
{0x3241, 0x0C},
{0x3242, 0x00}, */
{0x3502, 0x09}, //GAIN_RTS 9 - gain reflect at the next frame
{IMX568_TABLE_END, 0x00}
};
static imx568_reg imx568_2472x2064_10bit_20fps_2lane_594mbps[] = {
{0x3014, 0x05}, //INCKSEL_ST0 - INCK = 37.125 MHZ - 05h
{0x3015, 0x91}, //INCKSEL_ST1 - INCK = 37.125 MHZ - 91h
{0x3016, 0x50}, //INCKSEL_ST2 - INCK = 37.125 MHZ - 50h
{0x3018, 0x20}, //INCKSEL_ST3 - INCK = 37.125 MHZ - 20h
{0x3019, 0x02}, //INCKSEL_ST4 - INCK = 37.125 MHZ - 02h
{0x301B, 0x1D}, //INCKSEL_ST5 - INCK = 37.125 MHZ - 1Dh
{0x303C, 0x00}, //HVMODE - Drive mode setting of H/V direction - 0h: All-pixel
{0x30D0, 0xA8}, //VOPB_VBLK_HWIDTH - All Configs - 09A8h
{0x30D1, 0x09}, //
{0x30D2, 0xA8}, //FINFO_HWIDTH - All Configs - 09A8h
{0x30D3, 0x09}, //
{0x30D4, 0x76}, //VMAX - 594mbps - 0008(76)h
{0x30D5, 0x08}, //VMAX - 594mbps - 00(08)76h
{0x30D6, 0x00}, //VMAX - 594mbps - (00)0876h
{0x30D8, 0x43}, //HMAX - 594mbps - 06(43)h
{0x30D9, 0x06}, //HMAX - 594mbps - (06)43h
{0x30E2, 0x02}, //GMRWT - 594mbps - 02h
{0x30E3, 0x0A}, //GMTWT - 594mbps - 0Ah
{0x30E6, 0x04}, //GSDLY - 594mbps - 04h
{0x3200, 0x00}, //ADBIT - 10bit - 0h
{0x321C, 0x40}, //INCKSEL_N0 - 37.125MHz - 40h
{0x321D, 0x05}, //INCKSEL_N1 - All Configs - 05h
{0x321E, 0xE0}, //INCKSEL_N2 - 37.125MHz - E0h
{0x321F, 0x00}, //INCKSEL_N3 - 37.125MHz - 00h
{0x3224, 0x40}, //INCKSEL_D0 - 37.125MHz - 40h
{0x3225, 0x14}, //INCKSEL_D1 - All Configs - 14h
{0x3226, 0x80}, //INCKSEL_D2 - 37.125MHz&594mbps! - 80h
{0x3227, 0x90}, //INCKSEL_D3 - 891mbps - 90h
{0x323C, 0x19}, //LLBLANK - All Configs - 19h // VINT_EN register has been squeezed in for the first two bits of 323E
{0x323D, 0x00}, // // Set first two bits for VINT_EN, rest for LLBLANK. LLBLANK needs 0Ch.
{0x323E, 0x30}, // // 0 0 1 1 0 0 / 0 0 --> Can't touch first two, leaves us with 0x30.
{0x3430, 0x00}, //ODBIT - 10 bit - 0h
{0x3521, 0xED}, //??? - All Configs (?) - EDh // Check "Readout Mode" in datasheet
{0x3546, 0x3B}, //??? - All Configs (?) - 3Bh // Check "Readout Mode" in datasheet
{0x35B4, 0x3C}, //BLKLEVEL - 10 bit - 3Ch
{0x35B5, 0x00}, //
{0x3904, 0x03}, //LANESEL - 2-Lane - 03h
{0x3CA4, 0x80}, //TXCLKESC_FREQ - 37.125MHz - 09(80)h
{0x3CA5, 0x09}, //TXCLKESC_FREQ - 37.125MHz - (09)80h
{0x3CB4, 0x2F}, //THS_PREPARE - 594mbps - 00(2F)h
{0x3CB5, 0x00}, //THS_PREPARE - 594mbps - (00)2Fh
{0x3CB6, 0x67}, //TCLK_POST - 594mbps - 00(67)h
{0x3CB7, 0x00}, //TCLK_POST - 594mbps - (00)67h
{0x3CB8, 0x2F}, //THS_TRAIL - 594mbps - 00(2F)h
{0x3CB9, 0x00}, //THS_TRAIL - 594mbps - (00)2Fh
{0x3CBA, 0x4F}, //THS_ZERO - 594mbps - 00(4F)h
{0x3CBB, 0x00}, //THS_ZERO - 594mbps - (00)4Fh
{0x3CBC, 0x27}, //TCLK_PREPARE- 594mbps - 00(27)h
{0x3CBD, 0x00}, //TCLK_PREPARE- 594mbps - (00)27h
{0x3CBE, 0x27}, //TCLK_TRAIL - 594mbps - 00(27)h
{0x3CBF, 0x00}, //TCLK_TRAIL - 594mbps - (00)27h
{0x3CC0, 0x27}, //TLPX - 594mbps - 00(27)h
{0x3CC1, 0x00}, //TLPX - 594mbps - (00)27h
{0x3CC2, 0xB7}, //TCLK_ZERO - 594mbps - 00(B7)h
{0x3CC3, 0x00}, //TCLK_ZERO - 594mbps - (00)B7h
{0x3CC4, 0x0F}, //TCLK_PRE - 594mbps - 00(0F)h
{0x3CC5, 0x00}, //TCLK_PRE - 594mbps - (00)0Fh
{0x3CC6, 0x47}, //THS_EXIT - 594mbps - 00(47)h
{0x3CC7, 0x00}, //THS_EXIT - 594mbps - (00)47h
{0x3436, 0x00}, //TOUT0 pin setting 0h: Low fixed
common_mass,
/* {0x3240, 0x29}, //SHS !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
{0x3241, 0x0C},
{0x3242, 0x00}, */
{0x3502, 0x09}, //GAIN_RTS 9 - gain reflect at the next frame
{IMX568_TABLE_END, 0x00}
};
- I can’t get any raw frames, its gives just an empty file.