4 CSI-MIPI camera setup with Xavier 8GB - corr_err: discarding frame

Hi,
I’m running a 4 camera setup using 4x4 CSI-MIPI lanes on the Xavier 8GB and I’m experiencing some wierd issues.

  1. Connecting three cameras to any of the four CSI-MIPI connectors works fine, I’m able to stream video. However, when connecting the fourth camera i get issues on video2 and video3 with discarded frames, ex:
    [ 60.636217] tegra194-vi5 15c10000.vi: corr_err: discarding frame 1, flags: 112, err_data 6291556
  2. Any connector configuration with 3 cameras works fine. I’m utilizing Allied Vision Alvium with an IMX264 sensor.
  3. Just connecting the fourth camera gives me trouble, I do not have to run the fourth camera. F.ex. streaming video0, video2 and video3 gives me discarded frames. Streaming only video0, video1 and video2 gives me discarded frames.
  4. The device tree should be OK as I’m able to connect any configuration of three cameras and it is working. The .dtsi is appended at the bottom.

Running a trace I get the following:
kworker/4:1-1431 [004] … 142.993844: rtcpu_nvcsi_intr: tstamp:4881946029 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:4 vc:0 status:0x00000004
kworker/4:1-1431 [004] … 142.993844: rtcpu_nvcsi_intr: tstamp:4881947794 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:4 vc:0 status:0x00000004
kworker/4:1-1431 [004] … 142.993844: rtcpu_nvcsi_intr: tstamp:4881947794 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:4 vc:0 status:0x00000004
kworker/4:1-1431 [004] … 142.993844: rtcpu_nvcsi_intr: tstamp:4881948424 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:4 vc:0 status:0x00000004
kworker/4:1-1431 [004] … 142.993844: rtcpu_nvcsi_intr: tstamp:4881948424 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:4 vc:0 status:0x00000004
kworker/4:1-1431 [004] … 142.993844: rtcpu_nvcsi_intr: tstamp:4881962322 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:4 vc:0 status:0x00000004
kworker/4:1-1431 [004] … 142.993845: rtcpu_nvcsi_intr: tstamp:4881962322 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:4 vc:0 status:0x00000004
kworker/4:1-1431 [004] … 142.993845: rtcpu_vinotify_error: tstamp:4881976361 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:4881974723 data:0x00400064
kworker/4:1-1431 [004] … 142.993846: rtcpu_vinotify_event: tstamp:4881976811 tag:CHANSEL_PXL_EOF channel:0x21 frame:1 vi_tstamp:4881963090 data:0x08070002
kworker/4:1-1431 [004] … 142.993846: rtcpu_vinotify_event: tstamp:4881976985 tag:ATOMP_FRAME_DONE channel:0x21 frame:1 vi_tstamp:4881963112 data:0x00000000
kworker/4:1-1431 [004] … 142.993846: rtcpu_vinotify_event: tstamp:4881977131 tag:RESERVED_19 channel:0x21 frame:1 vi_tstamp:5898965504 data:0x020200c4
kworker/4:1-1431 [004] … 142.993847: rtcpu_vinotify_event: tstamp:4881977301 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:4881974723 data:0x00400064
kworker/4:1-1431 [004] … 142.993847: rtcpu_vinotify_event: tstamp:4881977452 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:4881974723 data:0x00000000
kworker/4:1-1431 [004] … 142.993849: rtos_queue_send_from_isr_failed: tstamp:4881985062 queue:0x0bcb41f8
kworker/4:1-1431 [004] … 142.993849: rtos_queue_send_from_isr_failed: tstamp:4881985227 queue:0x0bcb8a60
kworker/4:1-1431 [004] … 142.993850: rtos_queue_send_from_isr_failed: tstamp:4881985391 queue:0x0bcba5e0
kworker/4:1-1431 [004] … 142.993850: rtos_queue_send_from_isr_failed: tstamp:4881985548 queue:0x0bcbb3a0
kworker/4:1-1431 [004] … 142.993850: rtos_queue_send_from_isr_failed: tstamp:4881985705 queue:0x0bcbc160
kworker/4:1-1431 [004] … 142.993851: rtcpu_vinotify_event: tstamp:4882305456 tag:RESERVED_19 channel:0x21 frame:1 vi_tstamp:5899342304 data:0x000200c4
kworker/4:1-1431 [004] … 142.993853: rtcpu_vinotify_event: tstamp:4882305630 tag:RESERVED_19 channel:0x21 frame:0 vi_tstamp:5899347840 data:0x070200c5
kworker/4:1-1431 [004] … 142.993853: rtcpu_vinotify_event: tstamp:4882305804 tag:RESERVED_18 channel:0x21 frame:0 vi_tstamp:5899387104 data:0x10000000
kworker/4:1-1431 [004] … 142.993853: rtcpu_vinotify_event: tstamp:4882305950 tag:RESERVED_18 channel:0x21 frame:0 vi_tstamp:5899395584 data:0x310000c6

DTSI file:
/*
* Copyright © 2012 - 2019 Allied Vision Technologies. All Rights Reserved.
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.

 * THE SOFTWARE IS PRELIMINARY AND STILL IN TESTING AND VERIFICATION PHASE AND IS PROVIDED ON AN “AS IS” AND “AS AVAILABLE” BASIS AND IS BELIEVED TO CONTAIN DEFECTS.
 * A PRIMARY PURPOSE OF THIS EARLY ACCESS IS TO OBTAIN FEEDBACK ON PERFORMANCE AND THE IDENTIFICATION OF DEFECT SOFTWARE, HARDWARE AND DOCUMENTATION.

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */
#include "dt-bindings/clock/tegra194-clock.h"

#define CAM0_RST_L	TEGRA194_MAIN_GPIO(H, 3)
#define CAM0_PWDN	TEGRA194_MAIN_GPIO(H, 6)
#define CAM1_RST_L	TEGRA194_MAIN_GPIO(T, 6)
#define CAM1_PWDN	TEGRA194_MAIN_GPIO(T, 5)

#include "tegra194-agx-cti-camera-base.dtsi"


/ {
	gpio@2200000 {
		camera-control-output-low {
			gpio-hog;
			output-low;
			gpios = <CAM0_RST_L 0 CAM0_PWDN 0
				 CAM1_RST_L 0 CAM1_PWDN 0>;
			label = "cam0-rst", "cam0-pwdn",
				"cam1-rst", "cam1-pwdn";
		};
	};

	host1x {
		vi@15c10000 {
			num-channels = <4>;
			status = "okay";
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					status ="okay";
					reg = <0>;
					avt_csi2_vi_in0: endpoint {
						status = "okay";
						port-index = <0>;
						bus-width = <4>;
						remote-endpoint = <&avt_csi2_csi_out0>;
					};
				};
				port@1 {
					status ="okay";
					reg = <1>;
					avt_csi2_vi_in1: endpoint {
						status = "okay";
						port-index = <2>;
						bus-width = <4>;
						remote-endpoint = <&avt_csi2_csi_out1>;
					};
				};
				port@2 {
					status ="okay";
					reg = <2>;
					avt_csi2_vi_in2: endpoint {
						status = "okay";
						port-index = <4>;
						bus-width = <4>;
						remote-endpoint = <&avt_csi2_csi_out2>;
					};
				};
				port@3 {
					status ="okay";
					reg = <3>;
					avt_csi2_vi_in3: endpoint {
						status = "okay";
						port-index = <5>;
						bus-width = <4>;
						remote-endpoint = <&avt_csi2_csi_out3>;
					};
				};											
			};
		};

		nvcsi@15a00000 {
			status = "okay";
			num-channels = <4>;
			#address-cells = <1>;
			#size-cells = <0>;
			channel@0 {
				status = "okay";
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						status = "okay";
						reg = <0>;
						avt_csi2_csi_in0: endpoint@0 {
							status = "okay";
							port-index = <0>;
							bus-width = <4>;
							remote-endpoint = <&avt_csi2_out0>;
						};
					};
					port@1 {
						status = "okay";
						reg = <1>;
						avt_csi2_csi_out0: endpoint@1 {
							status = "okay";
							remote-endpoint = <&avt_csi2_vi_in0>;
						};
					};
				};
			};

			channel@1 {
				status = "okay";
				reg = <1>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						status = "okay";
						reg = <0>;
						avt_csi2_csi_in1: endpoint@2 {
							status = "okay";
							port-index = <2>;
							bus-width = <4>;
							remote-endpoint = <&avt_csi2_out1>;
						};
					};
					port@1 {
						status = "okay";
						reg = <1>;
						avt_csi2_csi_out1: endpoint@3 {
							status = "okay";
							remote-endpoint = <&avt_csi2_vi_in1>;
						};
					};
				};
			};	

			channel@2 {
				status = "okay";
				reg = <2>;
				ports {
					status = "okay";
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						status = "okay";
						reg = <0>;
						avt_csi2_csi_in2: endpoint@4 {
							status = "okay";
							port-index = <4>;
							bus-width = <4>;
							remote-endpoint = <&avt_csi2_out2>;
						};
					};
					port@1 {
						status = "okay";
						reg = <1>;
						avt_csi2_csi_out2: endpoint@5 {
							status = "okay";
							remote-endpoint = <&avt_csi2_vi_in2>;
						};
					};
				};
			};	

			channel@3 {
				status = "okay";
				reg = <3>;
				ports {
					status = "okay";
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						status = "okay";
						reg = <0>;
						avt_csi2_csi_in3: endpoint@6 {
							status = "okay";
							port-index = <6>;
							bus-width = <4>;
							remote-endpoint = <&avt_csi2_out3>;
						};
					};
					port@1 {
						status = "okay";
						reg = <1>;
						avt_csi2_csi_out3: endpoint@7 {
							status = "okay";
							remote-endpoint = <&avt_csi2_vi_in3>;
						};
					};
				};
			};								
		};
	};

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		status = "okay";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <16>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <8>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <160000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
			status = "okay";
			module0 {
				status = "okay";
				badge = "avt_csi2_bottomleft";
				position = "BottomLeft";
				orientation = "1";
				drivernode0 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "avt_csi2 0-003a";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/avt_csi2_a@3c";
				};
			};

			module1 {
				status = "okay";
				badge = "avt_csi2_centerleft";
				position = "CenterLeft";
				orientation = "0";
				drivernode0 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "avt_csi2 2-003c";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/avt_csi2_c@3e";
				};
			};

			module2 {
				status = "okay";
				badge = "avt_csi2_centerright";
				position = "CenterRight";
				orientation = "0";
				drivernode0 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "avt_csi2 2-003e";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/avt_csi2_e@38";
				};
			};

			module3 {
				status = "okay";
				badge = "avt_csi2_topleft";
				position = "TopLeft";
				orientation = "1";
				drivernode0 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "avt_csi2 2-003g";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/avt_csi2_g@34";
				};
			};						
		};
	};

	i2c@3180000 {
		avt_csi2_a@3c {
			status = "okay";
			clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
				 <&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";

			devnode = "video0";
			compatible = "alliedvision,avt_csi2";
			reg = <0x3c>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					avt_csi2_out0: endpoint {
						port-index = <0>;
						bus-width = <4>;
						remote-endpoint = <&avt_csi2_csi_in0>;
					};
				};
			};

			mode0 {
				num_lanes = "4";
				tegra_sinterface = "serial_a";
				discontinuous_clk = "no";
				cil_settletime = "0";
				embedded_metadata_height = "0";

				/* not verified: */
				mclk_khz = "24000";
				phy_mode = "DPHY";
				dpcm_enable = "false";

				active_w = "5488";
				active_h = "4112";
				pixel_t = "bayer_bggr";
				readout_orientation = "0";
				line_length = "5488";
				inherent_gain = "1";
				mclk_multiplier = "31.25";
				pix_clk_hz = "750000000";

				gain_factor = "16";
				framerate_factor = "1000000";
				exposure_factor = "1000000";
				min_gain_val = "16"; /* 1.0 */
				max_gain_val = "256"; /* 16.0 */
				step_gain_val = "1"; /* 0.125 */
				min_hdr_ratio = "1";
				max_hdr_ratio = "64";
				min_framerate = "1500000"; /* 1.5 */
				max_framerate = "30000000"; /* 30 */
				step_framerate = "1";
				min_exp_time = "34"; /* us */
				max_exp_time = "550385"; /* us */
				step_exp_time = "1";
			};
		};	
		avt_csi2_c@3e {
			status = "okay";
			clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
				 <&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";

			devnode = "video1";
			compatible = "alliedvision,avt_csi2";
			reg = <0x3e>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					avt_csi2_out1: endpoint {
						port-index = <2>;
						bus-width = <4>;
						remote-endpoint = <&avt_csi2_csi_in1>;
					};
				};
			};

			mode0 {
				num_lanes = "4";
				tegra_sinterface = "serial_c";
				discontinuous_clk = "no";
				cil_settletime = "0";
				embedded_metadata_height = "0";

				/* not verified: */
				mclk_khz = "24000";
				phy_mode = "DPHY";
				dpcm_enable = "false";

				active_w = "5488";
				active_h = "4112";
				pixel_t = "bayer_bggr";
				readout_orientation = "0";
				line_length = "5488";
				inherent_gain = "1";
				mclk_multiplier = "31.25";
				pix_clk_hz = "750000000";

				gain_factor = "16";
				framerate_factor = "1000000";
				exposure_factor = "1000000";
				min_gain_val = "16"; /* 1.0 */
				max_gain_val = "256"; /* 16.0 */
				step_gain_val = "1"; /* 0.125 */
				min_hdr_ratio = "1";
				max_hdr_ratio = "64";
				min_framerate = "1500000"; /* 1.5 */
				max_framerate = "30000000"; /* 30 */
				step_framerate = "1";
				min_exp_time = "34"; /* us */
				max_exp_time = "550385"; /* us */
				step_exp_time = "1";
			};
		};
		avt_csi2_e@38 {
			status = "okay";
			clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
				 <&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";

			devnode = "video2";
			compatible = "alliedvision,avt_csi2";
			reg = <0x38>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					avt_csi2_out2: endpoint {
						port-index = <4>;
						bus-width = <4>;
						remote-endpoint = <&avt_csi2_csi_in2>;
					};
				};
			};

			mode0 {
				num_lanes = "4";
				tegra_sinterface = "serial_e";
				discontinuous_clk = "no";
				cil_settletime = "0";
				embedded_metadata_height = "0";

				/* not verified: */
				mclk_khz = "24000";
				phy_mode = "DPHY";
				dpcm_enable = "false";

				active_w = "5488";
				active_h = "4112";
				pixel_t = "bayer_bggr";
				readout_orientation = "0";
				line_length = "5488";
				inherent_gain = "1";
				mclk_multiplier = "31.25";
				pix_clk_hz = "750000000";

				gain_factor = "16";
				framerate_factor = "1000000";
				exposure_factor = "1000000";
				min_gain_val = "16"; /* 1.0 */
				max_gain_val = "256"; /* 16.0 */
				step_gain_val = "1"; /* 0.125 */
				min_hdr_ratio = "1";
				max_hdr_ratio = "64";
				min_framerate = "1500000"; /* 1.5 */
				max_framerate = "30000000"; /* 30 */
				step_framerate = "1";
				min_exp_time = "34"; /* us */
				max_exp_time = "550385"; /* us */
				step_exp_time = "1";
			};
		};
		avt_csi2_g@34 {
			status = "okay";
			clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
				 <&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";

			devnode = "video3";
			compatible = "alliedvision,avt_csi2";
			reg = <0x34>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					avt_csi2_out3: endpoint {
						port-index = <6>;
						bus-width = <4>;
						remote-endpoint = <&avt_csi2_csi_in3>;
					};
				};
			};

			mode0 {
				num_lanes = "4";
				tegra_sinterface = "serial_g";
				discontinuous_clk = "no";
				cil_settletime = "0";
				embedded_metadata_height = "0";

				/* not verified: */
				mclk_khz = "24000";
				phy_mode = "DPHY";
				dpcm_enable = "false";

				active_w = "5488";
				active_h = "4112";
				pixel_t = "bayer_bggr";
				readout_orientation = "0";
				line_length = "5488";
				inherent_gain = "1";
				mclk_multiplier = "31.25";
				pix_clk_hz = "750000000";

				gain_factor = "16";
				framerate_factor = "1000000";
				exposure_factor = "1000000";
				min_gain_val = "16"; /* 1.0 */
				max_gain_val = "256"; /* 16.0 */
				step_gain_val = "1"; /* 0.125 */
				min_hdr_ratio = "1";
				max_hdr_ratio = "64";
				min_framerate = "1500000"; /* 1.5 */
				max_framerate = "30000000"; /* 30 */
				step_framerate = "1";
				min_exp_time = "34"; /* us */
				max_exp_time = "550385"; /* us */
				step_exp_time = "1";
			};
		};		
	};

	pinmux@2430000 {
		gen8_i2c_pinctrl: gen8_i2c_pinctrl {
			gen8_i2c_scl {
				nvidia,pins = "gen8_i2c_scl_pdd1";
				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			};
			gen8_i2c_sda {
				nvidia,pins = "gen8_i2c_sda_pdd2";
				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			};
		};
	};
};

Thank you for any assistance :)

The log show the CRC error on payload, it could be the interfere cause this problem.

1 Like

Looks like it might be inteference yes. I lowered the clock speed on the CSI bus and now it seems to be stable. Thank you!