AGX Orin Carrier Ethernet Support

[edward.solarte]

Hi all,

Could you please help me with the following questions:

Orin Carrier – custom Linux questions:

1. RGMII 1gbps LAN interface: How to bring up? What should be the content of
   “tegra234-ethernet-3737-0000-dtsi” file in
   “/source/hardware/nvidia/platform/t23x/concord/kernel-dts/cvb” directory?
   Is this the right “dtsi” file to config this interface?
   These are the modifications:

ethernet@2310000 {
phy-mode = “rgmii-id”;
phy-handle = <&phy>;
nvidia,phy-reset-gpio = <&tegra_main_gpio
TEGRA234_MAIN_GPIO(G, 5) 0>;

mdio {
compatible = “nvidia,eqos-mdio”;
#address-cells = <1>;
#size-cells = <0>;

phy: phy@1 {
reg = <1>;
nvidia,phy-rst-pdelay-msec = <224>; /*
msec /
nvidia,phy-rst-duration-usec = <10000>;
/ usec */
interrupt-parent = <&tegra_main_gpio>;
interrupts = <TEGRA234_MAIN_GPIO(G, 4)
IRQ_TYPE_LEVEL_LOW>;
};
};
};
We disabled all the MGBE ports and pinmux, the way NVIDIA described it in the main bring-up document, for AGX Orin custom carriers.

PHY ic : MARVELL 88E1512-A0

Status of the interface: Eth shows up in the boot up sequence, but run into an error (see in the log):

2. PCIe (C1 lane-el) also does not work, we configured the following file “tegra234-p3737-pcie.dtsi” in the “/source/hardware/nvidia/platform/t23x/concord/kernel-dts/cvb” directory.
   See the modifications:

pcie@14100000 {
status = “okay”;

phys = <&p2u_hsio_3>;
phy-names = “p2u-0”;

num-lanes = <1>;
nvidia,max-speed = <4>;
nvidia,disable-aspm-states = <0xf>;
nvidia,enable-power-down;
};

pcie@14160000 {
status = “disabled”;

phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
<&p2u_hsio_7>;
phy-names = “p2u-0”, “p2u-1”, “p2u-2”, “p2u-3”;
};

pcie@141a0000 {
status = “disabled”;

phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = “p2u-0”, “p2u-1”, “p2u-2”, “p2u-3”, “p2u-4”,
“p2u-5”, “p2u-6”, “p2u-7”;
};

pcie_ep@141a0000 {
status = “disabled”;

reset-gpios = <&tegra_main_gpio
TEGRA234_MAIN_GPIO(AF, 1)
GPIO_ACTIVE_LOW>;

nvidia,refclk-select-gpios = <&tegra_main_gpio
TEGRA234_MAIN_GPIO(Q, 4)
GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = “p2u-0”, “p2u-1”, “p2u-2”, “p2u-3”, “p2u-4”,
“p2u-5”, “p2u-6”, “p2u-7”;
};
I made a comparison to the Devkit, where you use this lane in M2. E port. See the document in the attachments.

3. Is the SDKmanagers flash function rebuild the image file? Until now we delete the Image file for safety purposes.

Of course after a modification we re-compile the source files with “Bootlin
Toolcahin 9.3"-al and re-flash the hole device (not just the kernel partitions, with this method the pinmux/gpio modifications work).

4. USB type A:

(this is the front usb c on the Devkit)
Problems:
This USB also do not work. We are not able to use it, whereas our usb type-C with the same hardware design (filtering, ESD protection) works fine.
Probably the origin of the problem is at linux driver level. Maybe turning off usb recovery would help? ( we did not find a config option for this)

type-c port:

[WayneWWW]

Just to explain how things work here.

1. Please just focus on one issue in one topic. For example, your topic is talking about ethernet, then just focus on ethernet. File other topics for other I/O issues.

2. Read your own post and make sure the log is attached after you sent out the post.

[edward.solarte]

Hi Wayne, sure, I will repost with the separate topics