To be enable RGMII for AGX Orin Custom Board

[sumin.lee1]

Hello,

We are trying to be enable RGMII on AGX Orin.

I found the device-tree code as below:

Jetson AGX Orin RGMII to use

Hi, Please configure the "phy-mode to “rgmii-id” under your ethernet@2310000. [image] Make sure the hardware connection is following the table 7-1 in the Orin hardware design guide.

Could I input this code to “tegra234-ethernet-3737-0000.dtsi”?

And case of AGX Xavier, It has device tree code for “ethernet@2490000” in “tegra194-power-tree-p2888-0001-p2822-1000.dtsi”

Does same thing need to AGX Orin?
Do I need to put the code to “tegra234-power-tree-p3701-0000-p3737-0000.dtsi” if does it need?

[WayneWWW]

You only need to configure the things mentioned in the developer guide document.

[sumin.lee1]

Hello,

I tried to be enable RGMII as follow:

RGMII Enabling Problem

Hello, We need to use the RGMII interface on our custom carrier board (designed for AGX Xavier). We tried the following solutions from other topics. But we have not fixed this. -Jetson ORIN: RGMII can't send data - #6 by kangqi236 -Jetson AGX Orin RGMII to use - #6 by WayneWWW -Does Orin support 88E1512 PHY chip? - #18 by WayneWWW I’m attaching the .dts (exported from our DTB file), debug logs & configured pinmux files. tegra234-p3701-0000-p3737-0000.dts (488.3 KB) agx_orin_dmesg.txt (96…

I refer the dts file from above and modify dtsi file as below:

I can see the messages in related to RGMII address, but it’s all.
There is nothing more than it as I known.
5.device-tree_all3_bootlog.txt (91.3 KB)

[ 12.484600] nvethernet 2310000.ethernet: Adding to iommu group 52
[ 12.490996] nvethernet 2310000.ethernet: failed to read skip mac reset flag, default 0
[ 12.499163] nvethernet 2310000.ethernet: failed to read MDIO address
[ 12.505728] nvethernet 2310000.ethernet: setting to default DMA bit mask
[ 12.759550] nvethernet 2310000.ethernet: Ethernet MAC address: 48:b0:2d:95:8d:14
[ 12.768069] nvethernet 2310000.ethernet: Macsec not enabled
[ 12.773805] nvethernet 2310000.ethernet: Macsec: Reduced MTU: 1466 Max: 16383
[ 12.783083] nvethernet 2310000.ethernet: eth0 (HW ver: 53) created with 8 DMA channels

There is no eth0 port on ifconfig list after boot.
So, I tried to be up the eth0, It doesn’t work.

And I have one more question about pinmux.
I used pinmux spreadsheet as below:

Orin-jetson_agx_orin_rgmii-gpio-default.dtsi (3.9 KB)
Orin-jetson_agx_orin_rgmii-pinmux.dtsi (64.7 KB)

I can’t find any different on the dmesg before and after about pinmux changes for eqos.

[WayneWWW]

Your pinmux totally not matches the result on document.

[sumin.lee1]

Sorry, I didn’t catch what you mean “the result on document”.

[WayneWWW]

Open the L4T developer guide document. Search “RGMII” in the document and it will lead you to the guide.

[sumin.lee1]

Hello, Wayne

I tried to apply L4T Guide what you commented
https://docs.nvidia.com/jetson/archives/r35.3.1/DeveloperGuide/text/HR/JetsonModuleAdaptationAndBringUp/JetsonAgxOrinSeries.html#for-rgmii

tegra234-ethernet-3737-0000.dtsi (2.2 KB)
tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi (62.5 KB)

The result is not different from previous.

Is there anymore point what should I check?

[WayneWWW]

1. The device tree you attached is eve not completed.

2. What is the result of cat /proc/interrupts |grep eth? Does the value increase when you ifconfig up down the RGMII?

[WayneWWW]

If interrupt does not go up, please check the register as this post said.

Your pinmux may still have problem.

Problem with RGMII Ethernet (88E1512) with JP 5.1.0 on AGX Orin (was working with JP 5.0.1DP and on Xavier)

I don’t have device to check for now. But I think you can read the pinmux register and gpio register for those pins and confirm if they are same as jp5.0.1DP. Checking pinmux register is not sufficient to prove whether this pin is in GPIO or SFIO because GPIO controller has higher priority. For example, if you read pinmux reg and see it as SFIO, however, GPIO controller sets it as GPIO in the meantime, then it will still be GPIO.

[sumin.lee1]

Thank you for the reply

There is no list about eth0 on interrupts.
And “ifconfig eth0 up” doesn’t work as below

Could you let me know what information does not updated to my device tree??
pinmux cfg file?? ethernet dtsi file? or both?
I’d be appreciate, if you point it out.

[WayneWWW]

It means pinmux is still wrong. Check the register as above post said.

[sumin.lee1]

Are gpio status correct?

[WayneWWW]

Not only GPIO. Every pin there should have correct state.

[sumin.lee1]

Previous pinmux file has the missed point what I didn’t changed.

It has fixed now.

I checked out several times the pinmux and l4t guide.
And I can’t find anymore different,
tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi (62.5 KB)

But the result are same.