AGX xavier use spi2_clk & spi2_miso SFIO1 function of uartg_tx & uartg_rx. I do a lot work ,but not get throuth

Robotics & Edge Computing Jetson Systems Jetson AGX Xavier
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1
  1. I use the Jetson_AGX_Xavier_Series_Pinmux_Configuration_Template_v1.6.xlsm general out the right function of spi2_clk & spi2_miso SFIO1 function to uartg_tx & uartg_rx. Then use pinmux-dts2cfg.py general out the cfg file .replace the right file in the bootloader/t186ref/BCT .
    The sudo cat /sys/kernel/debug/pinctrl/2430000.pinmux/pinconf-groups | grep -n -B12 -A5 “func=uartg” show like this:

8-9 (spi2_sck_pcc0):
139- pull=2
140- tristate=0
141- enable-input=0
142- open-drain=0
143- io-reset=1
144- rcv-sel=1
145- io-hv=1
146- schmitt=1
147- pull-down-strength=0
148- pull-up-strength=0
149- drive-type=0
150: func=uartg
151- pad-power=0
152- gpio-mode=1
153-10 (spi2_miso_pcc1):
154- pull=2
155- tristate=1
156- enable-input=1
157- open-drain=0
158- io-reset=1
159- rcv-sel=1
160- io-hv=1
161- schmitt=1
162- pull-down-strength=0
163- pull-up-strength=0
164- drive-type=0
165: func=uartg
166- pad-power=0
167- gpio-mode=1

In kernel dts ,i add the uartg in tegra194-p2888-0001-p2822-0000-common.dtsi like this:
&serial@c290000 {
compatible = “nvidia,tegra186-hsuart”;
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&uartg_tx_pcc0 &uartg_rx_pcc1>; // 引用具体的配置
clock-names = “serial”, “parent”;
clocks = <&bpmp_clks TEGRA194_CLK_UARTG>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
assigned-clocks = <&bpmp_clks TEGRA194_CLK_UARTG>;
assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
};

&pinmux {
/* 配置 GPIO3_PCC.00 为 UARTG_TX /
uartg_tx_pcc0 {
nvidia,pins = “spi2_sck_pcc0”; / 引脚的硬件名称 /
nvidia,function = “uartg”; / 要切换的功能 */
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};

/* 配置 GPIO3_PCC.01 为 UARTG_RX */
uartg_rx_pcc1 {
	nvidia,pins = "spi2_miso_pcc1"; /* 引脚的硬件名称 */
	nvidia,function = "uartg";      /* 要切换的功能 */
	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
	nvidia,tristate = <TEGRA_PIN_DISABLE>;
	nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};

};

Add in tegra194-p2888-0001-p2822-0000.dts

&uartg {
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&pinmux_uartg>; // 引用 Pinmux 配置
};

&pinmux {
pinmux_uartg: uartg {
spi2_sck_pcc0 {
nvidia,pins = “spi2_sck_pcc0”;
nvidia,function = “uartg”;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
spi2_miso_pcc1 {
nvidia,pins = “spi2_miso_pcc1”;
nvidia,function = “uartg”;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
spi2_mosi_pcc2 {
nvidia,pins = “spi2_mosi_pcc2”;
nvidia,function = “uartg”;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi2_cs0_pcc3 {
nvidia,pins = “spi2_cs0_pcc3”;
nvidia,function = “uartg”;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
};

Then after these work ,i can have the device /dev/ttyTHS6 ,but its not work in communicate .

does some one can help?

2

Hello @automationboy!

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4

There is no update from you for a period, assuming this is not an issue anymore.
Hence, we are closing this topic. If need further support, please open a new one.
Thanks ~0624

Hi automationboy,

Are you using the devkit or custom board for AGX Xavier?
What’s the Jetpack version in use?

Could you share the full dmesg and device tree fo further check?