There is no update from you for a period, assuming this is not an issue any more.
Hence we are closing this topic. If need further support, please open a new one.
Thanks
@PeterYu
We tried JP 4.4 DP image on multiple Jetson-Xavier NX boards, but still could not reproduce the issue. We need some additional details for further debugging.
clock tree dump:
cat /sys/kernel/debug/bpmp/debug/clk/clk_tree
APE Clock setting:
cat /sys/kernel/debug/bpmp/debug/clk/ape/min_rate
cat /sys/kernel/debug/bpmp/debug/clk/ape/max_rate
cat /sys/kernel/debug/bpmp/debug/clk/ape/rate
cat /sys/kernel/debug/bpmp/debug/clk/ape/possible_parents
cat /sys/kernel/debug/bpmp/debug/clk/ape/parent
APE Parent Clock setting:
cat /sys/kernel/debug/bpmp/debug/clk/<ape_parent>/min_rate
cat /sys/kernel/debug/bpmp/debug/clk/<ape_parent>/max_rate
cat /sys/kernel/debug/bpmp/debug/clk/<ape_parent>/rate
cat /sys/kernel/debug/bpmp/debug/clk/<ape_parent>/parent
where ape_parent is the output of “cat /sys/kernel/debug/bpmp/debug/clk/ape/parent”