How to access/manipulate Always On (AON) GPIOs from the SPE/AON processor?

I am using the “Jetson Xavier NX module (P3668-0000)” Board and trying for"GPIO application demonstrates" by following the below this page [Jetson Sensor Processing Engine (SPE) Developer Guide: GPIO Application (app/gpio-app.c)]. But facing the below errors while compiling…

Set the ENV variables like below:
export TOP=$(pwd)
export CROSS_COMPILE=$(pwd)/gcc-arm-none-eabi-4_8-2014q3/bin/arm-none-eabi-
export FREERTOS_DIR=$(pwd)/FreeRTOSV8.1.2/FreeRTOS/Source
export FREERTOS_COMMON_DIR=$PWD/freertos-common

#sudo make bin_t19x;

Errors: (Though I am able to see the env set correctly I see the below errors)
ERROR: variable not set or empty: TOP
ERROR: variable not set or empty: CROSS_COMPILE
Makefile:37: *** Environment sanity check failed. Stop.

If I remove the error line 37 from the top Makefile I am able to compile but I see different error like below.
Makefile:297: /rt-aux-cpu-demo-fsp/soc/t23x/target_specific.mk: No such file or directory
make: *** No rule to make target ‘/rt-aux-cpu-demo-fsp/soc/t23x/target_specific.mk’. Stop.

Could someone please help me to compile for “Jetson NX” {#make bin_t19x}.

Hello,
May I know what’s the version of SPE firmware you are using?
In addition, why you run make by ‘sudo’? different user may result in different environment variables.
You can make a script for building. Paste the script I’m using for SPE FW package for BSP 32.5.

cat spe-firmware-build.sh

#!/bin/bash
set -e

export TOP="${HOME}/Work/jetson_sdk/32.5/spe-fw/l4t-rt"
export CROSS_COMPILE="${HOME}/Tools/gcc-arm-none-eabi-4_8-2014q3/bin/arm-none-eabi-"
export FREERTOS_DIR=${TOP}/FreeRTOSV8.1.2/FreeRTOS/Source
export FREERTOS_COMMON_DIR=${TOP}/freertos-common

## To build for Jetson AGX ##
cd ${TOP}/rt-aux-cpu-demo && make -j8 bin_t19x && make docs

br
ChenJian

I will add something to what @jachen is suggesting…

You can run “sudo -s” prior to setting variables, and then they will exist for that sudo session. However, it is probably wrong to use sudo for this. Better to leave pristine source owned by root, but with an output and configuration location owned by the individual user, although I don’t know what direct support there is for that with that particular software.

I changed the permission for the source code to full permission. After that I am able to compile and create the spe.bin for my Jetson Xavier NX module (P3668-0000) "

But I am facing the Kernel panic error after loading this spe.bin. I followed the below kernel building guide (skipped the “Optionally, archive the installed kernel modules:” since I do not have any kernel changes)
https://docs.nvidia.com/jetson/archives/r35.1/DeveloperGuide/text/SD/Kernel/KernelCustomization.html#building-the-kernel

Will post you the logs soon.

Hello Team,

I am using the “Jetson Xavier NX module (P3668-0000) ” Board and trying for"GPIO application demonstrates" by following the below this page [Jetson Sensor Processing Engine (SPE) Developer Guide: GPIO Application (app/gpio-app.c)].

I am able to compile the spe.bin and generate the flash image for my board and this spe.bin is successfully coming up with my logs.(Rapsodo debug log Setting GPIO_APP_OUT to 1 - IRQ should trigger)

But I am seeing the kenel panic in the logs. Full log is attached with this.

Please review and correct me if i am doing any mistakes
log.txt (41.3 KB)

Kernel-Panic:

[ 4.720262] tsec 15100000.tsecb: initialized
[ 4.724374] gic 2a41000.agic-controller: GIC IRQ controller registered
[ 4.749906] tegra-aconnect aconnect@2a41000: Tegra ACONNECT bus registered
[ 4.763023] gpio-374 (wifi-enable): hogged as output/high
[ 4.763555] gpio-431 (camera-control-output-low): hogged as output/low
[ 4.763965] gpio-432 (camera-control-output-low): hogged as output/low
[ 4.765775] gpiochip1: registered GPIOs 335 to 503 on tegra194-gpio
[ 4.767547] gpiochip2: registered GPIOs 305 to 334 on tegra194-gpio-aon
[ 4.767936] CPU:0, Error: aon-noc@c600000, irq=17
[ 4.769028] **************************************
[ 4.773843] CPU:0, Error:aon-noc
[ 4.777257] Error Logger : 0
[ 4.780411] ErrLog0 : 0x80030000
[ 4.784008] Transaction Type : RD - Read, Incrementing
[ 4.789327] Error Code : SLV
[ 4.792740] Error Source : Target
[ 4.796414] Error Description : Target error detected by CBB slave
[ 4.802823] AXI2APB_5 bridge error: RDFIFOF - Read Response FIFO Full interrupt
[ 4.810356] Packet header Lock : 0
[ 4.813762] Packet header Len1 : 3
[ 4.817675] NOC protocol version : version >= 2.7
[ 4.822694] ErrLog1 : 0x1280e8
[ 4.826086] ErrLog2 : 0x0
[ 4.828982] RouteId : 0x1280e8
[ 4.832205] InitFlow : cbb_i/I/0
[ 4.835648] Targflow : multiport0_t/T/gpio
[ 4.840169] TargSubRange : 0
[ 4.843396] SeqId : 0
[ 4.846201] ErrLog3 : 0x1280
[ 4.849348] ErrLog4 : 0x0
[ 4.852062] Address accessed : 0xc2f1280
[ 4.856262] ErrLog5 : 0x4fc21
[ 4.859501] Master ID : CCPLEX
[ 4.862910] Security Group(GRPSEC): 0x7e
[ 4.867112] Cache : 0x1 – Bufferable
[ 4.871222] Protection : 0x1 – Privileged, Secure, Data Access
[ 4.877521] FALCONSEC : 0x0
[ 4.880672] Virtual Queuing Channel(VQC): 0x0
[ 4.885402] **************************************
[ 4.890609] CPU:0, Error: cbb-noc@2300000, irq=15
[ 4.895022] **************************************
[ 4.900009] CPU:0, Error:cbb-noc
[ 4.903335] Error Logger : 0
[ 4.906495] ErrLog0 : 0x80030000
[ 4.909983] Transaction Type : RD - Read, Incrementing
[ 4.915321] Error Code : SLV
[ 4.918743] Error Source : Target
[ 4.922414] Error Description : Target error detected by CBB slave
[ 4.928811] Packet header Lock : 0
[ 4.932472] Packet header Len1 : 3
[ 4.936147] NOC protocol version : version >= 2.7
[ 4.941136] ErrLog1 : 0x32002a
[ 4.944547] ErrLog2 : 0x0
[ 4.947435] RouteId : 0x32002a
[ 4.950853] InitFlow : ccroc_p2ps/I/ccroc_p2ps
[ 4.955749] Targflow : axis_satellite_grout/T/axis_satellite_grout
[ 4.962221] TargSubRange : 0
[ 4.965634] SeqId : 0
[ 4.968346] ErrLog3 : 0xc2f1280
[ 4.971585] ErrLog4 : 0x0
[ 4.974390] Address accessed : 0xc2f1280
[ 4.978419] ErrLog5 : 0xa89f851
[ 4.981839] Non-Modify : 0x1
[ 4.985059] AXI ID : 0x15
[ 4.988208] Master ID : CCPLEX
[ 4.991622] Security Group(GRPSEC): 0x7e
[ 4.995526] Cache : 0x1 – Bufferable
[ 4.999933] Protection : 0x2 – Unprivileged, Non-Secure, Data Access
[ 5.006782] FALCONSEC : 0x0
[ 5.009956] Virtual Queuing Channel(VQC): 0x0
[ 5.014584] **************************************
[ 5.019641] ------------[ cut here ]------------
[ 5.024107] kernel BUG at drivers/soc/tegra/cbb/tegra194-cbb.c:2057!
[ 5.030675] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
[ 5.035846] Modules linked in:
[ 5.039069] CPU: 0 PID: 111 Comm: kworker/0:2 Not tainted 5.10.104-tegra #1
[ 5.046061] Hardware name: Unknown NVIDIA Jetson Xavier NX Developer Kit/NVIDIA Jetson Xavier NX Developer Kit, BIOS 1.0-d7fb19b 08/10/2022
[ 5.058385] Workqueue: events deferred_probe_work_func
[ 5.063565] pstate: 60400089 (nZCv daIf +PAN -UAO -TCO BTYPE=–)
[ 5.069616] pc : tegra194_cbb_err_isr+0x19c/0x1b0
[ 5.074317] lr : tegra194_cbb_err_isr+0x11c/0x1b0
[ 5.079048] sp : ffff800010003b40
[ 5.082374] x29: ffff800010003b40 x28: 0000000000000001
[ 5.087813] x27: 0000000000000080 x26: ffffa4e71a9548c8
[ 5.093228] x25: ffffa4e71b29ae10 x24: 0000000000000001
[ 5.098552] x23: ffffa4e71ac37000 x22: ffffa4e71b0bea00
[ 5.104064] x21: 000000000000000f x20: 0000000000000005
[ 5.109514] x19: ffffa4e71b0be9f0 x18: 0000000000000010
[ 5.114920] x17: ffff80001057e000 x16: 00000000031402ca
[ 5.120434] x15: ffff3a4f80f33f70 x14: ffffffffffffffff
[ 5.125988] x13: ffff800090003737 x12: ffff800010003740
[ 5.131382] x11: 0000000000000038 x10: 0101010101010101
[ 5.136915] x9 : ffff800010003a50 x8 : 2a2a2a2a2a2a2a2a
[ 5.142444] x7 : 2a2a2a2a2a2a2a09 x6 : c0000000ffffefff
[ 5.147962] x5 : 0000000000057fa8 x4 : ffffa4e71af47968
[ 5.153323] x3 : 00000000ffffffff x2 : ffffa4e7193ee170
[ 5.158664] x1 : ffff3a4f80f33a00 x0 : 0000000100010100
[ 5.164009] Call trace:
[ 5.166471] tegra194_cbb_err_isr+0x19c/0x1b0
[ 5.170793] __handle_irq_event_percpu+0x68/0x2a0
[ 5.175311] handle_irq_event_percpu+0x40/0xa0
[ 5.179773] handle_irq_event+0x50/0xf0
[ 5.183518] handle_fasteoi_irq+0xc0/0x170
[ 5.187544] generic_handle_irq+0x40/0x60
[ 5.191563] __handle_domain_irq+0x70/0xd0
[ 5.195791] efi_header_end+0xb0/0xf0
[ 5.199264] el1_irq+0xd0/0x180
[ 5.202236] __do_softirq+0xb4/0x3e8
[ 5.205925] irq_exit+0xc0/0xe0
[ 5.208887] __handle_domain_irq+0x74/0xd0
[ 5.212908] efi_header_end+0xb0/0xf0
[ 5.216586] el1_irq+0xd0/0x180
[ 5.219596] tegra186_gpio_probe+0x5d4/0x830
[ 5.223856] platform_drv_probe+0x5c/0xb0
[ 5.228056] really_probe+0xf8/0x3d0
[ 5.231377] driver_probe_device+0x60/0xc0
[ 5.235486] __device_attach_driver+0x8c/0xd0
[ 5.239947] bus_for_each_drv+0x8c/0xe0
[ 5.243886] __device_attach+0xf8/0x160
[ 5.247823] device_initial_probe+0x28/0x40
[ 5.251935] bus_probe_device+0xa4/0xb0
[ 5.255800] deferred_probe_work_func+0x90/0xd0
[ 5.260347] process_one_work+0x1c4/0x4a0
[ 5.264448] worker_thread+0x200/0x430
[ 5.268390] kthread+0x148/0x170
[ 5.271714] ret_from_fork+0x10/0x24
[ 5.275417] Code: a9446bf9 a94573fb a8c67bfd d65f03c0 (d4210000)
[ 5.281633] —[ end trace 3e6f68945bd57dfd ]—
[ 5.286328] Kernel panic - not syncing: Oops - BUG: Fatal exception in interrupt
[ 5.293589] SMP: stopping secondary CPUs
[ 5.297562] Kernel Offset: 0x24e709230000 from 0xffff800010000000
[ 5.303647] PHYS_OFFSET: 0xffffc5b180000000
[ 5.307781] CPU features: 0x8240002,03802a30
[ 5.312135] Memory Limit: none
[ 5.315206] —[ end Kernel panic - not syncing: Oops - BUG: Fatal exception in interrupt ]—
��gpio_app_task - Rapsodo debug log Setting GPIO_APP_OUT to 1 - IRQ should trigger
gpio_app_task - Rapsodo debug log Setting GPIO_APP_OUT to 1 - IRQ should trigger
gpio_app_task - Rapsodo debug log Setting GPIO_APP_OUT to 1 - IRQ should trigger
gpio_app_task - Rapsodo debug log Setting GPIO_APP_OUT to 1 - IRQ should trigger

Hello,
have you ever followed all instructions in Jetson Sensor Processing Engine (SPE) Developer Guide: GPIO Application (app/gpio-app.c) (nvidia.com)?
Re-paste here:

Jetson NX

In order to access a AON GPIO from the Cortex-R5 SPE/AON for Jetson NX, ENABLE_SPE_FOR_NX flag has to be set to 1 in the target_specific.mk file in the in the soc/t19x. The GPIO SCR, GPIO interrupt map and pinmux settings need to be updated as described in below steps.

  1. Update SCR values as below in the file tegra194-mb1-bct-scr-cbb-mini-p3668.cfg:

scr.49.6 = 0x18001010; # GPIO_CC_SCR_04_0 scr.53.6 = 0x18001010; # GPIO_DD_SCR_00_0

  1. Update gpio interrupt mapping as below in tegra194-mb1-bct-gpioint-p3668-0001-a00.cfg:

gpio-intmap.port.CC.pin.4 = 2; # GPIO CC4 to INT2 gpio-intmap.port.DD.pin.0 = 2; # GPIO DD0 to INT2

  1. Update default pinmux configuration as below in the file tegra19x-mb1-pinmux-p3668-a01.cfg:

pinmux.0x0c302000 = 0x00000025; # touch_clk_pcc4: GPIO, pull-down, input-disable pinmux.0x0c302040 = 0x00000075; # gen2_i2c_sda_pdd0: i2c2, pull-down, input-enable

  1. Compile device tree and flash the entire board to ensure that the SCR, gpio interrupt mapping and pinmux settings are flashed on the board.
  2. Short GPIO pins of the 40 pin header J12 pin 15 and pin 27, this should print out “GPIO input irq triggered” message since pin 15 is configured as OUT which drives the pin 27 which is configured as INPUT and also has interrupt enabled.

After all those changes, please re-flash the whole device.

br
Chenjian

Yes. Followed.

Did you check my logs? I am able to bring up the spe firmware with AON enabled.

[ 4.724374] gic 2a41000.agic-controller: GIC IRQ controller registered
[ 4.749906] tegra-aconnect aconnect@2a41000: Tegra ACONNECT bus registered
[ 4.763023] gpio-374 (wifi-enable): hogged as output/high
[ 4.763555] gpio-431 (camera-control-output-low): hogged as output/low
[ 4.763965] gpio-432 (camera-control-output-low): hogged as output/low
[ 4.765775] gpiochip1: registered GPIOs 335 to 503 on tegra194-gpio
[ 4.767547] gpiochip2: registered GPIOs 305 to 334 on tegra194-gpio-aon
[ 4.767936] CPU:0, Error: aon-noc@c600000, irq=17
**[ 4.769028] ****************************************
[ 4.773843] CPU:0, Error:aon-noc
[ 4.777257] Error Logger : 0
[ 4.780411] ErrLog0 : 0x80030000
[ 4.784008] Transaction Type : RD - Read, Incrementing
[ 4.789327] Error Code : SLV
[ 4.792740] Error Source : Target
[ 4.796414] Error Description : Target error detected by CBB slave
[ 4.802823] AXI2APB_5 bridge error: RDFIFOF - Read Response FIFO Full interrupt

Hello,
That kernel panic log does not help more.
Let’s start from beginning.

  1. Flash the device with original BSP/SPE firmware. The device should be able to boot correctly.
  2. You can re-compile your own kernel and boot the device with updated kernel image. Make sure it works well.
  3. Compile the SPE firmware package, without any change. Replace the spe.bin with your own building,
  4. If 3 is good, you can start with GPIO changes in SPE firmware.

Let us know your progress.

br
ChenJian

First 3 steps are ok. only with cfg file changes I am seeing this errors.

Which BSP / SPE firmware version you are using?

br
ChenJian

All packages are downloaded from here:

I am using ubuntu 22.04 image

Could you confirm the .cfg configuration are correct? I suspect this

o. I’ve not tried 35.2.1 yet.
Is that possible to try old BSP, like 32.5, with Xavier NX BSP + SPE firmware?

I will check 35.2.1 locally, but it may take time.

br
Chenjian

SPE will not be available for old BSP. I have checked for 32.5 its not there.

Anyhow, We want the latest one and not interested in old one (we have this latest BSP for others). Could you try and confirm?

You can visit L4T 32.5 Archive | NVIDIA Developer
and download SPE firmware by https://developer.nvidia.com/embedded/L4T/r32_Release_v5.0/sources/T186/l4t_rt_aux_cpu_src.tbz2

You can just start from 32.5 SPE development and get familiar with SPE updates.

Sure, we will check 35.2 SPE functions, but it may take time.

br
ChenJian

Hello,
I’ve checked the SPE package.
If you are using BSP 35.2.1, unfortunately, SPE package in that version cannot support Xavier NX platform.
You can take a look at Jetson Sensor Processing Engine (SPE) Developer Guide: Welcome (nvidia.com)
In this release, only Orin AGX and Xavier AGX are supported.

br
Chenjian

Hi Jachen,

Thanks for the conformation. Is the below version is tested for Xavier NX platform??

You can take a look at Jetson Sensor Processing Engine (SPE) Developer Guide: Welcome (nvidia.com)

Regards,
Ayyappan R

Hello,
A simple way is to check the docs in SPE source package.
For example, Jetson Sensor Processing Engine (SPE) Developer Guide: GPIO Application (app/gpio-app.c) (nvidia.com) contains the Xavier NX information, and that means the corresponding package is verified in Xavier NX platform.

br
ChenJian

OK. I will try 32.5 SPE development.