Cortex R5 core and "Jetson Sensor Processing Engine (SPE)" on NX DevKit

Hello,

We are very interested in utilizing the Cortex R5 core available on NX, but have a few questions after reading " Jetson Sensor Processing Engine (SPE)" documentation:

  1. Does this core have an FP unit?
  2. Which toolchain we can use to compile the code for it? Documentation talks about very old cross compilation toolchain available on https://launchpad.net/gcc-arm-embedded/4.8/4.8-2014-q3-update, however we would like to compile natively on NX board itself. Can we use default GCC available in Ubuntu “gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04)” or we need to build gcc-arm-embedded/4.8/4.8-2014-q3-update to run natively on NX linux?
  3. How we can start Cortex R5 firmware on NX DevKIt? From what I see in the documentation, the firmware need to be flashed to “spe-fw” partition (on eMMC which we don’t have on NX DevKit)? Where should we put the F/W image on NX DevKit for it to be used? Which bootloader loads this F/W to Cortex R5 core and starts it? Is there any way to reload a different F/W from inside the linux system?
    Thanks in advance!

-albertr

Hello, albertr:

  1. No FPU support for SPE R5.
  2. It’s not recommended. Different toolchain is not strictly verified and may result in unexpected issues.
  3. SPE firmware is loaded and starting to run at bootloader stage (MB1). SPE firmware will be located at eMMC or SDCARD, depending on NV devkit you got. But it’s not possible to reload a different SPE firmware inside Linux system.

br
ChenJian

Hi ChenJian,

We have NX DevKit, so no eMMC, but there’s SDCARD. Where should we put the SPE firmware image for it to be read by the bootloader? If we update the SPE firmware image, is rebooting the only way to restart R5 with the new code?

-albertr

Hello, albertr;
When you flash the device, the SPE firmware will be flashed to the storage media together with other components, like boot-loader, DTB, kernel, etc. So don’t worry about that.
Generally, after flashing, the device will reboot and so new SPE firmware will be loaded automatically.

br
Chenjian

Hi Chenjian,

We are using the NX DevKIt here, so it has SDCARD, but no eMMC and no flashing for us. The kernel, DTB and initrd are loaded from ext4 filesystem on SDCARD. Can you please let us know where SPE firmware image is located in our setup?

-albertr

Hello, albertr:
with SDCARD, you can also flash the device. Please refer to https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fadaptation_and_bringup_xavier_nx.html%23wwpID0E0AD0HA

br
ChenJian

ChenJian,

I don’t want to put it into recovery mode, and I don’t see any reason to. Can you tell me how I can write the SPE firmware from inside the linux running on NX itself?

-albertr

Hello, albertr:
SPE firmware is located in boot-partition. You can also take a
look at https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fbootloader_update_agx_tx2.html.
but that may not work as you’ve expected. Generally, flashing device is a recommended way.

br
ChenJian

1 Like

ChenJian,

What is the name of the partition it’s located in? And which flash memory device is holding this partition on NX module that came with DevKit? I think there’re two devices on this NX module: Winbond SPI flash chip and Spansion NOR flash chip. Do you know which one is holding this partition and what is the partition’s name or number? Can this partition be moved to SDCARD (will bootloader look for it there)?

-albertr

I don’t know if it can be moved but it’s on the 32MB NOR flash (/dev/mtdblk0).
Here’s the layout:
https://docs.nvidia.com/jetson/l4t/Tegra%20Linux%20Driver%20Package%20Development%20Guide/part_config.html#wwp102400
They are also in the following file in L4T… bootloader/t186ref/cfg/flash_l4t_t194_spi_sd_p3668.xml

Thje device isn’t partitioned in the Linux sense. You have to calculate the offset using the sizes in the table.

Hello, albertr:
You can check the bootloader/flash.xml after a successful flashing. That file describes the layout of storage media.
For NX devkit, first part is SPI, and you can see spe-fw, which stores SPE R5 firmware. That cannot be moved to SDCARD in current release.

br
Chenjian

where to locate the file md_rt-aux-cpu-demo_doc_gpio.html ?
how to apply SPE at NX?
Is there a documentation describing it?

Hello, Andrey:
You can download the SPE source package from https://developer.nvidia.com/embedded/downloads#?search=spe
Check files in doc and you can get primary information for SPE firmware.

br
ChenJian

@jachen thank you for your response
I already downloaded sources.
However, it turned out that they have steps defined for TX2 & AGX.
Using the documentation for AGX I was able to flash spe-firmware with flash.sh to AGX device. FreeRTOS and Sensor Processing Engine
Moreover, I anticipate that flashing the same to NX will likely need adjusted steps, as otherwise discrepancies in the device tree and file structure might emerge multiple issues, in my opinion.
Could you also suggest basic samples to try after flashing the spe to jetson just to confirm it worked correctly, please?

1 Like

Hello, Andrey:
yes. SPE in NX is very similar to AGX, except those pins exported due to different carrier board.
You can start from some examples like timer (doc/timer-app.md), or ivc (doc/devicetree-ivc.md)
But for other apps, like GPIO, UART, CAN, etc., you may have to double check the pins in NX and AGX. Those can work as long as the correct pins are connected.
SPE firmware for NX is still under development.

br
ChenJian

1 Like

the .dtsi files need to be compiled into .dtb files. where is the procedure for that and the procedure for running the modules for testing? This flash worked: sudo ./flash.sh -k spe-fw jetson-xavier-nx-devkit mmcblk0p1 I believe we are looking at make TARGET=t18x as indicatd by the l4t release Tegra186_Linux_R32.4.2_aarch64. However this release only contains the device tree binaries as opposed to the device tree source.