The method using Cortex-R5 core and Sensor Processing System

Hello, we want to use CAN via Sensor Processing Engine. However, I am a starter of it. So I want to know some questions on SPE.

Until now, we have compiled the example in the document:

https://docs.nvidia.com/jetson/archives/spe-archived/spe-3261/md__home_dipenp_rel-32-new_rt-aux-cpu-demo_delete_gmc4_32_85_public_l4t-rt_rt-aux-cpu-demo_doc_can-app.html

And now, we have some questions about that below, the question is bolded:

  1. First, we want to know how to use Cortex-R5.

In my opinion, I treat the Cortex-R5 as a MCU. Just like what we should do while using MCU. We compile the software on PC, whose output may be a “hex” file or “bin” file.

So the Cortex-R5 may should be used in the same way. We compile the program on PC via gcc-arm-toolchain. Get the “bin” file and flash it with:

sudo ./flash.sh -k spe-fw <T186 or T194 SoC based Jetson platforms> mmcblk0p1

And then the program is flashed into EEPROM. When we power the NX, the Cortex-R5 run the program in EEPROM.

We want to know whethe what I have mentioned above is the usage of Cortex-R5.

And Could you please give us an example of the flash comman line above? Our NX is AGX Xavier NX, jetpack 35.3.1

And the flash won’t change the Linux system right?

  1. Secondly, we want to know how CAN is used on SPE.

In the example given in the “app/can-app.c”, we just find two init function of TX and RX.

void can_app_init(void)
{
	can_app_tx_task_init(CAN_TX_CONTROLLER);
	can_app_rx_task_init(CAN_RX_CONTROLLER);
}

It just like the init function in MCU.

So can we understand it as the init function of two interrupt function?

And then, if we treat it as interrupt function or RTOS system. When we enter the “can_app_tx_task_init”, we found the “xTaskCreate”, which is a function of RTOS.

	/* CAN TX task */
	ret = xTaskCreate(can_xmit_test, 0, 512, ttcan, tskIDLE_PRIORITY,
			  &can_xmit_handle);
	if (ret != pdPASS) {
		printf("CAN%lu: xTaskCreate for transmit failed\r\n", ttcan->id);
		goto can_deinit_err;
	}

However, we don’t find the “can_xmit_test”, which should be a function ptr in that parameter. And it should also represent the task we want to set.

So in the example, the “can_xmit_test” is not given. When we want to set task of tx, we need to write a function code right? Just like this:

void can_xmit_test(void){
	...
}

And in addition, can it be treated like an interrupt funciton, which means when CAN send something, the Cortex-R5 will run it.

  1. And finally, can Cortex-R5 communicate with Linux system? And how to make it?

Hello,
We want to know whethe what I have mentioned above is the usage of Cortex-R5.
[NV] yes. A little mistake is that the image is flashed to eMMC or QSPI flash.
And Could you please give us an example of the flash comman line above? Our NX is AGX Xavier NX, jetpack 35.3.1
[NV] You can try
sudo ./flash.sh -k spe-fw jetson-xavier-nx-devkit-emmc mmcblk0p1
And the flash won’t change the Linux system right?
[NV] yes. -k will only update specified partition.
So can we understand it as the init function of two interrupt function?
[NV] Please check the code. that function performs more than ISR init.
In addition, in 35.3.1, no CAN demo code is provided. You can have to add that by yourself. You can take a look at SPE source package in older BSP, like 32.5, which has CAN code, as a reference.
3. And finally, can Cortex-R5 communicate with Linux system? And how to make it?
[NV] Please take a look at rt-aux-cpu-demo/doc/devicetree-ivc.md

br
Chenjian

Thank you for your reply! We will try making it.

Don’t forget that if you flash a specific partition, that you need to make sure the new image fits within that partition. Also, remember that those partitions are signed, so you cannot use dd unless you’ve signed the partition first (there is a “--no-flash -u <rsa_priv>.pem -v <sbk>.key” option for creating signed content which is not deleted upon the flash program finishing).

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.