Jetson not booting up after flashing SPE script

I wanted to use the Sensor Processing Engine (SPE) in the AGX, so I flashed the default script for UART communication following the instructions in the documentation. Not only did the script didn’t work, I cannot get my Jetson to boot. Everything leading to this point was smooth. The flash script did not give any errors, so I don’t know where I went wring. For the moment, I don’t care about the SPE. I just want my Jetson to boot up normally. I tried flashing new Jetpack, but the SDK Manager does not recognize the board as being connected. I used the serial debug port to get the boot logs and here is what I got. How can I get the board to boot normally? Please help!

[0000.095] W> RATCHET: MB1 binary ratchet value 4 is too large than ratchet level 2 from .
[0000.103] I> MB1 (prd-version: 1.5.1.6-t194-41334769-1740dd39)
[0000.109] I> Boot-mode: Coldboot
[0000.112] I> Chip revision : A02P
[0000.115] I> Bootrom patch version : 15 (correctly patched)
[0000.120] I> ATE fuse revision : 0x200
[0000.123] I> Ram repair fuse : 0x1
[0000.126] I> Ram Code : 0x2
[0000.129] I> rst_source : 0x0
[0000.132] I> rst_level : 0x0
[0000.135] I> Boot-device: eMMC
[0000.150] I> sdmmc DDR50 mode
[0000.154] W> No valid slot number is found in scratch register
[0000.160] W> Return default slot: _a
[0000.163] I> Active Boot chain : 0
[0000.166] I> Boot-device: eMMC
[0000.170] W> MB1_PLATFORM_CONFIG: device prod data is empty in MB1 BCT.
[0000.178] I> Temperature = 25000
[0000.181] W> Skipping boost for clk: BPMP_CPU_NIC
[0000.185] W> Skipping boost for clk: BPMP_APB
[0000.189] W> Skipping boost for clk: AXI_CBB
[0000.193] W> Skipping boost for clk: AON_CPU_NIC
[0000.197] W> Skipping boost for clk: CAN1
[0000.201] W> Skipping boost for clk: CAN2
[0000.205] I> Boot-device: eMMC
[0000.208] I> Boot-device: eMMC
[0000.217] I> Sdmmc: HS400 mode enabled
[0000.222] I> ECC region[0]: Start:0x0, End:0x0
[0000.226] I> ECC region[1]: Start:0x0, End:0x0
[0000.230] I> ECC region[2]: Start:0x0, End:0x0
[0000.234] I> ECC region[3]: Start:0x0, End:0x0
[0000.238] I> ECC region[4]: Start:0x0, End:0x0
[0000.243] I> Non-ECC region[0]: Start:0x80000000, End:0x100000000
[0000.248] I> Non-ECC region[1]: Start:0x0, End:0x0
[0000.253] I> Non-ECC region[2]: Start:0x0, End:0x0
[0000.257] I> Non-ECC region[3]: Start:0x0, End:0x0
[0000.262] I> Non-ECC region[4]: Start:0x0, End:0x0
[0000.267] E> FAILED: Thermal config
[0000.274] E> FAILED: MEMIO rail config
[0000.293] I> Boot-device: eMMC
[0000.302] I> sdmmc bdev is already initialized
[0000.377] I> MB1 done

����
��init uartc for combined uart
��[0000.384] I> Welcome to MB2(TBoot-BPMP) (version: 00.00.2018.32-mobile-feba5943)
[0000.386] I> DMA Heap @ [0x526fa000 - 0x52ffa000]
[0000.387] I> Default Heap @ [0xd486400 - 0xd48a400]
[0000.388] E> DEVICE_PROD: Invalid value data = 70020000, size = 0.
[0000.389] W> device prod register failed
[0000.389] I> Boot-device: eMMC
[0000.392] I> Boot_device: SDMMC_BOOT instance: 3
[0000.398] I> sdmmc-3 params source = boot args
[0000.401] I> sdmmc bdev is already initialized
[0000.405] I> sdmmc-3 params source = boot args
[0000.413] I> Found 17 partitions in SDMMC_BOOT (instance 3)
[0000.420] I> Found 42 partitions in SDMMC_USER (instance 3)
[0000.421] W> No valid slot number is found in scratch register
[0000.426] W> Return default slot: _a
[0000.429] I> Active Boot chain : 0
[0000.433] I> parsing oem signed section of bpmp-fw header done
[0000.438] I> bpmp-fw binary init read from storage
[0000.443] I> oem authentication of bpmp-fw header done
[0000.451] I> bpmp-fw binary done read from storage
[0000.452] I> bpmp-fw: Authentication init Done
[0000.457] I> parsing oem signed section of cpubl header done
[0000.462] I> cpubl binary init read from storage
[0000.467] I> bpmp-fw: Authentication Finalize Done
[0000.471] I> oem authentication of cpubl header done
[0000.476] I> cpubl binary done read from storage
[0000.481] I> cpubl: Authentication init Done
[0000.485] I> parsing oem signed section of rce header done
[0000.490] I> rce binary init read from storage
[0000.495] I> Relocating BR-BCT
[0000.497] I> cpubl: Authentication Finalize Done
[0000.502] I> oem authentication of rce header done
[0000.506] I> rce binary done read from storage
[0000.511] I> rce: Authentication init Done
[0000.515] I> parsing oem signed section of ape header done
[0000.520] I> ape binary init read from storage
[0000.524] I> rce: Authentication Finalize Done
[0000.529] I> oem authentication of ape header done
[0000.533] I> ape binary done read from storage
[0000.537] I> ape: Authentication init Done
[0000.542] I> parsing oem signed section of tos header done
[0000.547] I> tos binary init read from storage
[0000.551] I> ape: Authentication Finalize Done
[0000.556] I> oem authentication of tos header done
[0000.560] I> tos binary done read from storage
[0000.564] I> tos: Authentication init Done
[0000.568] I> parsing oem signed section of bpmp-fw-dtb header done
[0000.574] I> bpmp-fw-dtb binary init read from storage
[0000.579] I> tos: Authentication Finalize Done
[0000.585] I> oem authentication of bpmp-fw-dtb header done
[0000.592] I> bpmp-fw-dtb binary done read from storage
[0000.594] I> bpmp-fw-dtb: Authentication init Done
[0000.599] I> parsing oem signed section of cpubl-dtb header done
[0000.604] I> cpubl-dtb binary init read from storage
[0000.609] I> bpmp-fw-dtb: Authentication Finalize Done
[0000.646] I> oem authentication of cpubl-dtb header done
[0000.647] I> cpubl-dtb binary done read from storage
[0000.648] I> cpubl-dtb: Authentication init Done
[0000.650] I> parsing oem signed section of eks header done
[0000.651] I> eks binary init read from storage
[0000.652] I> cpubl-dtb: Authentication Finalize Done
[0000.653] I> oem authentication of eks header done
[0000.655] I> eks binary done read from storage
[0000.659] I> eks: Authentication init Done
[0000.663] I> eks: Authentication Finalize Done
[0000.667] I> EKB detected (length: 0x410) @ VA:0x5270a400
��NOTICE: BL31: v1.3(release):5b49e7f80
NOTICE: BL31: Built : 14:42:47, Jan 15 2021
ipc-unittest-main: 1519: Welcome to IPC unittest!!!
ipc-unittest-main: 1531: waiting forever
ipc-unittest-srv: 329: Init unittest services!!!
hwkey-agent: 40: hwkey-agent is running!!
hwkey-agent: 197: key_mgnt_processing …
hwkey-agent: 189: Setting EKB key 0 to slot 14
hwkey-agent: 167: Init hweky-agent services!!
luks-srv: 40: luks-srv is running!!
luks-srv: 157: Init luks-srv IPC services!!
platform_bootstrap_epilog: trusty bootstrap complete
��

welcome to lk
calling constructors
initializing heap
creating bootstrap completion thread
top of bootstrap2()
initializing platform
bpmp: platform_init
tag is e73a758761f0c6d24a1e69a2ac6b5035
tag_show initialized
dt initialized
mail initialized
chipid initialized
fuse initialized
sku initialized
speedo initialized
ec_get_ec_list: found 45 ecs
ec initialized
ec_mrq initialized
vmon_populate_monitors: found 3 monitors
vmon initialized
adc initialized
fmon_populate_monitors: found 73 monitors
fmon initialized
fmon_mrq initialized
reset initialized
nvhs initialized
392 clocks registered
WARNING: pll_c4 has no dyn ramp
clk_mrq_init: mrq handler registered
clk initialized
nvlink initialized
io_dpd initialized
io_dpd initialized
thermal initialized
i2c5 controller initialized
initialized i2c mrq handling
i2c initialized
regulator initialized
avfs_clk_platform initialized
soctherm initialized
aotag initialized
powergate initialized
dvs initialized
pm initialized
pg_late initialized
strap initialized
tag initialized
emc initialized
clk_dt initialized
avfs_ccplex_platform initialized
tj_max: dt node not found
tj_init initialized
uphy_mrq_init: mrq handler registered
uphy_dt initialized
uphy initialized
safereg_init: period 80 ms
ec_late initialized
mrq initialized
fmon_post initialized
��
[0001.172] I> Welcome to Cboot
[0001.172] I> Cboot Version: t194-9efcbc4f
[0001.173] I> CPU-BL Params @ 0xf2820000
[0001.173] I> 0) Base:0x00000000 Size:0x00000000
[0001.175] I> 1) Base:0xf1100000 Size:0x00100000
[0001.180] I> 2) Base:0xf2000000 Size:0x00200000
[0001.184] I> 3) Base:0xf1200000 Size:0x00200000
[0001.188] I> 4) Base:0xf1000000 Size:0x00100000
[0001.193] I> 5) Base:0xf0f00000 Size:0x00100000
[0001.197] I> 6) Base:0xf3800000 Size:0x00400000
[0001.202] I> 7) Base:0xf1c00000 Size:0x00400000
��clk_set_parent failed for clk i2c2, parent pll_aon (-22)
clk_set_parent failed for clk i2c8, parent pll_aon (-22)
clk_dt_late initialized
machine_check initialized
pm_post initialized
dbells initialized
avfs_clk_platform_post initialized
dmce initialized
cvc initialized
ccplex_avfs_hw_init: nafll_cluster0: not monitored
ccplex_avfs_hw_init: nafll_cluster1: not monitored
ccplex_avfs_hw_init: nafll_cluster2: not monitored
ccplex_avfs_hw_init: nafll_cluster3: not monitored
avfs_clk_mach_post initialized
regulator_post initialized
rm initialized
sc7_diag initialized
thermal_test initialized
serial_late initialized
clk_post initialized
clk_dt_post initialized
mc_reg initialized
pg_post initialized
dyn_modules initialized
sku_debugfs initialized
speedo_debugfs initialized
adc_debugfs initialized
clk_debugfs initialized
��[0001.206] I> 8) Base:0xf0e00000 Size:0x00100000
[0001.286] I> 9) Base:0xf0d00000 Size:0x00100000
[0001.290] I> 10) Base:0xf3000000 Size:0x00800000
[0001.295] I> 11) Base:0x40000000 Size:0x00040000
[0001.299] I> 12) Base:0xf0c00000 Size:0x00100000
[0001.304] I> 13) Base:0x40046000 Size:0x00002000
[0001.308] I> 14) Base:0x40048000 Size:0x00002000
[0001.313] I> 15) Base:0xac000000 Size:0x00004000
[0001.317] I> 16) Base:0x4004a000 Size:0x00002000��emc_debugfs initialized
dvs_debugfs initialized
fmon_debugfs initialized
vmon_debugfs initialized
pg_debugfs initialized
profile_fs initialized
debugfs_cons initialized
mail_fs initialized
profile initialized
cvc_debugfs initialized
dmce_debugfs initialized
ec_debugfs initialized
rm_debugfs initialized
soctherm_debug initialized
gr_reader initialized
mods initialized
dt_fs initialized
debugfs_mrq initialized
debug_mrq initialized
debug_safereg initialized
initializing target
calling apps_init()
starting app shell
entering main console loop
] ��
[0001.372] I> 17) Base:0xf0b00000 Size:0x00100000
[0001.376] I> 18) Base:0x4004c000 Size:0x00002000
[0001.381] I> 19) Base:0xf2200000 Size:0x00600000
[0001.385] I> 20) Base:0x4004e000 Size:0x00002000
[0001.390] I> 21) Base:0xf0ad0000 Size:0x0000c000
[0001.394] I> 22) Base:0x00000000 Size:0x00000000
[0001.399] I> 23) Base:0xf0ae0000 Size:0x00020000
[0001.403] I> 24) Base:0xf6000000 Size:0x02000000
[0001.408] I> 25) Base:0x40050000 Size:0x00002000
[0001.412] I> 26) Base:0x40040000 Size:0x00006000
[0001.416] I> 27) Base:0xf1800000 Size:0x00400000
[0001.421] I> 28) Base:0xf4c00000 Size:0x01400000
[0001.425] I> 29) Base:0xf1400000 Size:0x00400000
[0001.430] I> 30) Base:0x00000000 Size:0x00000000
[0001.434] I> 31) Base:0x00000000 Size:0x00000000
[0001.439] I> 32) Base:0xf8000000 Size:0x08000000
[0001.443] I> 33) Base:0x00000000 Size:0x00000000
[0001.448] I> 34) Base:0xf3c00000 Size:0x01000000
[0001.452] I> 35) Base:0xab000000 Size:0x01000000
[0001.457] I> 36) Base:0xa0000000 Size:0x0b000000
[0001.461] I> 37) Base:0xf2800000 Size:0x00800000
[0001.466] I> 38) Base:0x80000000 Size:0x20000000
[0001.470] I> 39) Base:0xb0000000 Size:0x08000000
[0001.474] I> 40) Base:0x00000000 Size:0x00000000
[0001.479] I> 41) Base:0x00000000 Size:0x00000000
[0001.483] I> 42) Base:0x00000000 Size:0x00000000
[0001.488] I> 43) Base:0x00000000 Size:0x00000000
[0001.492] I> 44) Base:0x00000000 Size:0x00000000
[0001.497] I> 45) Base:0x00000000 Size:0x00000000
[0001.501] GIC-SPI Target CPU: 0
[0001.504] Interrupts Init done
[0001.507] calling constructors
[0001.510] initializing heap
[0001.513] I> Heap: [0xa06945e8 … 0xab000000]
[0001.517] initializing threads
[0001.520] initializing timers
[0001.523] creating bootstrap completion thread
[0001.527] top of bootstrap2()
[0001.530] CPU: MIDR: 0x4E0F0040, MPIDR: 0x80000000
[0001.534] initializing platform
[0001.537] E> DEVICE_PROD: Invalid value data = 0, size = 0.
[0001.543] W> device prod register failed
[0001.547] I> Bl_dtb @0xaaf00000
[0001.553] W> “plugin-manager” doesn’t exist, creating
[0001.554] W> “ids” doesn’t exist, creating
[0001.559] W> “connection” doesn’t exist, creating
[0001.563] W> “configs” doesn’t exist, creating
[0001.574] I> Find /i2c@3160000’s alias i2c0
[0001.575] I> Reading eeprom i2c=0 address=0x50
[0001.601] I> Device at /i2c@3160000:0x50
[0001.602] I> Reading eeprom i2c=0 address=0x56
[0001.626] I> Device at /i2c@3160000:0x56
[0001.629] I> Find /i2c@3180000’s alias i2c2
[0001.629] I> Reading eeprom i2c=2 address=0x54
[0001.631] E> I2C: slave not found in slaves.
[0001.632] E> I2C: Could not write 0 bytes to slave: 0x00a8 with repeat start true.
[0001.633] E> I2C_DEV: Failed to send register address 0x00000000.
[0001.634] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xa8 at 0x000000.
[0001.640] E> eeprom: Failed to read I2C slave device
[0001.645] I> Eeprom read failed 0x3526070d
[0001.649] I> Reading eeprom i2c=2 address=0x57
[0001.654] E> I2C: slave not found in slaves.
[0001.658] E> I2C: Could not write 0 bytes to slave: 0x00ae with repeat start true.
[0001.665] E> I2C_DEV: Failed to send register address 0x00000000.
[0001.671] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xae at 0x000000.
[0001.680] E> eeprom: Failed to read I2C slave device
[0001.685] I> Eeprom read failed 0x3526070d
[0001.689] I> Reading eeprom i2c=2 address=0x52
[0001.694] E> I2C: slave not found in slaves.
[0001.698] E> I2C: Could not write 0 bytes to slave: 0x00a4 with repeat start true.
[0001.705] E> I2C_DEV: Failed to send register address 0x00000000.
[0001.711] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xa4 at 0x000000.
[0001.721] E> eeprom: Failed to read I2C slave device
[0001.725] I> Eeprom read failed 0x3526070d
[0001.730] I> Find /i2c@c240000’s alias i2c1
[0001.733] I> Reading eeprom i2c=1 address=0x52
[0001.739] E> I2C: slave not found in slaves.
[0001.742] E> I2C: Could not write 0 bytes to slave: 0x00a4 with repeat start true.
[0001.750] E> I2C_DEV: Failed to send register address 0x00000000.
[0001.755] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xa4 at 0x000000.
[0001.765] E> eeprom: Retry to read I2C slave device.
[0001.770] E> I2C: slave not found in slaves.
[0001.774] E> I2C: Could not write 0 bytes to slave: 0x00a4 with repeat start true.
[0001.781] E> I2C_DEV: Failed to send register address 0x00000000.
[0001.787] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xa4 at 0x000000.
[0001.796] E> eeprom: Failed to read I2C slave device
[0001.801] I> Eeprom read failed 0x3526070d
[0001.805] I> Reading eeprom i2c=1 address=0x50
[0001.810] E> I2C: slave not found in slaves.
[0001.814] E> I2C: Could not write 0 bytes to slave: 0x00a0 with repeat start true.
[0001.822] E> I2C_DEV: Failed to send register address 0x00000000.
[0001.827] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xa0 at 0x000000.
[0001.837] E> eeprom: Retry to read I2C slave device.
[0001.841] E> I2C: slave not found in slaves.
[0001.845] E> I2C: Could not write 0 bytes to slave: 0x00a0 with repeat start true.
[0001.853] E> I2C_DEV: Failed to send register address 0x00000000.
[0001.859] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xa0 at 0x000000.
[0001.868] E> eeprom: Failed to read I2C slave device
[0001.873] I> Eeprom read failed 0x3526070d
[0001.877] I> create_pm_ids: id: 2888-0004-400-L, len: 15
[0001.882] I> config: mem-type:00,power-config:00,misc-config:00,modem-config:00,touch-co3
[0001.893] I> create_pm_ids: id: 2822-0000-700-K, len: 15
[0001.899] I> config: mem-type:00,power-config:00,misc-config:00,modem-config:00,touch-co3
[0001.910] I> Adding plugin-manager/ids/2888-0004-400=/i2c@3160000:module@0x50
[0001.917] W> “i2c@3160000” doesn’t exist, creating
[0001.921] W> “module@0x50” doesn’t exist, creating
[0001.926] I> Adding plugin-manager/ids/2822-0000-700=/i2c@3160000:module@0x56
[0001.933] W> “module@0x56” doesn’t exist, creating
[0001.939] I> Adding plugin-manager/cvm
[0001.941] W> “chip-id” doesn’t exist, creating
[0001.945] I> Adding plugin-manager/chip-id/A02P
[0001.950] I> Plugin-manager override starting
[0001.955] I> node /plugin-manager/fragement-tegra-wdt-en matches
[0001.963] I> node /plugin-manager/fragement-soft-wdt matches
[0001.972] I> node /plugin-manager/fragment-pcie-c5-rp matches
[0001.976] I> node /plugin-manager/fragment-tegra-ufs-lane10 matches
[0001.987] I> Disable plugin-manager status in FDT
[0001.987] I> Plugin-manager override finished successfully
[0001.988] I> gpio framework initialized
[0001.992] I> tegrabl_gpio_driver_register: register ‘nvidia,tegra194-gpio’ driver
[0001.999] I> tegrabl_gpio_driver_register: register ‘nvidia,tegra194-gpio-aon’ driver
[0002.006] I> tegrabl_tca9539_init: i2c bus: 1, slave addr: 0x46
[0002.013] W> fetch_driver_phandle_from_dt: failed to get node with compatible ti,tca9539
[0002.021] W> fetch_driver_phandle_from_dt: failed to get node with compatible nxp,tca9539
[0002.027] W> tegrabl_tca9539_init: failed to fetch phandle from dt
[0002.033] I> tegrabl_tca9539_init: i2c bus: 1, slave addr: 0x44
[0002.041] W> fetch_driver_phandle_from_dt: failed to get node with compatible ti,tca9539
[0002.049] W> fetch_driver_phandle_from_dt: failed to get node with compatible nxp,tca9539
[0002.055] W> tegrabl_tca9539_init: failed to fetch phandle from dt
[0002.063] I> fixed regulator driver initialized
[0002.074] I> register ‘maxim’ power off handle
[0002.075] I> virtual i2c enabled
[0002.076] I> registered ‘maxim,max20024’ pmic
[0002.077] I> tegrabl_gpio_driver_register: register ‘max20024-gpio’ driver
[0002.084] I> Boot-device: eMMC
[0002.087] I> Boot_device: SDMMC_BOOT instance: 3
[0002.095] I> sdmmc-3 params source = boot args
[0002.096] I> create_pm_ids: id: 2888-0004-400-L, len: 15
[0002.101] I> config: mem-type:00,power-config:00,misc-config:00,modem-config:00,touch-co3
[0002.112] I> create_pm_ids: id: 2822-0000-700-K, len: 15
[0002.117] I> config: mem-type:00,power-config:00,misc-config:00,modem-config:00,touch-co3
[0002.128] I> sdmmc bdev is already initialized
[0002.132] I> sdmmc-3 params source = boot args
[0002.163] I> Found 17 partitions in SDMMC_BOOT (instance 3)
[0002.176] I> Found 42 partitions in SDMMC_USER (instance 3)
[0002.186] I> enabling ‘vdd-hdmi-5v0’ regulator
[0002.192] I> regulator ‘vdd-hdmi-5v0’ already enabled
[0002.192] E> tegrabl_display_init_regulator: hdmi cable is not connected
[0002.193] E> tegrabl_display_get_pdata, failed to parse dtb settings
[0002.198] E> invalid display type
[0002.202] E> invalid display type
[0002.203] E> cannot find any other nvdisp nodes
[0002.204] E> no valid display unit config found in dtb
[0002.206] W> display init failed
[0002.206] I> Load in CBoot Boot Options partition and parse it
[0002.215] E> Error -9 when finding node with path /boot-configuration
[0002.216] E> tegrabl_cbo_parse_info: “boot-configuration” not found in CBO file.
[0002.222] I> Using default boot order
[0002.226] I> boot-dev-order :-
[0002.229] I> 1.sd
[0002.230] I> 2.usb
[0002.232] I> 3.nvme
[0002.234] I> 4.emmc
[0002.236] I> 5.net
[0002.238] I> Hit any key to stop autoboot: 4 3��-------------------------------
Exception: Data abort
DFAR: 0x0c290014, DFSR: 0x00000008
PC: 0x0c48b61c
LR: 0x0c48b694, SP: 0x0c49a9d0, PSR: 0x8000001f
R0: 0x0c290014, R1: 0x00000014, R2: 0x00000014
R3: 0x0c290014, R4: 0x00000000, R5: 0x00000000
R6: 0x00000000, R7: 0x00000000, R8: 0x00000000
R9: 0x00000000, R10: 0x00000000, R11: 0x0c49a9dc
R12: 0x0c49aa32

Is this the AGX Xavier in a dev kit? Other carrier boards would have other requirements, but flash should not be a problem even if some other software had been previously unbootable. If you are using a VM, then this would be one reason why the recovery mode AGX is not recognized. Another common problem is not using the correct USB-C connector for the connection to the host PC (recovery mode won’t show up on the other USB connectors).

what are the exact steps you implemented, could you extend, please?
what are the exact steps to reproduce the issue?

Yes, this is the dev kit.
No, I am not using a VM
The USB connector might be an issue though. I used a generic USB-C connector lying around. It was also used when flashing the script and the Jetson was recognized then, so I expect it should be recognized in recovery mode as well. Shouldn’t it?

Hello, jaiyamsharma:
Don’t worry. Normal flash will not damage hardware.
Since SPE firmware will be loaded and run in very early stage of device booting, it may hang the device if there’s something wrong with SPE firmware.
You can start from beginning.

  1. Check whether the device can enter RCM. (Recovery key + reset or power-on). Connect USB cable, and check ‘lsusb’ result in host PC.
  2. Download SDK and re-flash the device. (As BSP/firmware developer, I strongly recommend flashing the device by command line, instead of jetpack. You can check Welcome — Jetson Linux<br/>Developer Guide 34.1 documentation for details.)

Let me know if you still have problem. It’s better to paste logs from both host PC and device.

br
ChenJian

br
ChenJian

Yes, since the USB-C worked on other content, then likely it is not a problem. It could be a problem, but not likely. So I recommend what @jachen just mentioned. Firmware may not have been correct, but there is no problem flashing again, and even better to use a freshly downloaded flash software since we don’t know if something is corrupt in the original SDKM download.

@jachen @linuxdev @Andrey1984 Thank you for your advice. jachen’s advice finally solvedd the problem. I have flashed a fresh copy of JetPack to the dev kit.

Although I have no plans to use the SPE, this episode doesn’t give me confidence that I could use it if I ever needed to. Could nvidia make it easy to flash the SPE and without messing up the main tegra board in the process? This is a feature request. Please add a way to program the SPE with jetson itself.

Hello, jaiyamsharma:
NV should be glad to hear the input to improve the SDK quality and usability.
I’m not sure whether you mean to flash SPE firmware singly.
The doc in SPE package provides the command line, and you can check it.
“doc/compile-flash.md”

sudo ./flash.sh -k spe-fw mmcblk0p1

Hope that can help.

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ChenJian

Hi @jachen
Thanks for the response. The command line utility can flash the SPE firmware only from an x86 host. This can break the jetpack installation (like it did for me) if there is a problem with the SPE firmware. It would be much better if we had the ability to flash SPE firmware from the Jetson directly without involving the x86 host. I don’t know if there are any technical reasons which would prevent nvidia from implementing this feature.

Hello, jaiyamsharma:
SPE can both be updated through host PC and device side.
From PC side, you have already known the flash command, as stated above.
From device code, you can take a look at https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/bootloader_update_agx_tx2.html#wwpID0E0NB0HA
SPE firmware is one component in bootloader and will be included in BUP.

In addition, if the system hangs due to error from SPE firmware, you may still have to re-flash the device.

Per my understanding, SPE firmware should be easy to handle as long as you dig into it. Feel free to initialize new thread if you have new problem.

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ChenJian

this is not required when following just uart SPE documentation that is a separate file, right?

Hello, Andrey1984:
Sorry, I do not understand your question very clearly. Can you specify the details?

Generally, once the SPE firmware changes, the spe-fw should be updated in device to make new spe-fw work.
Besides this, if kernel-dtb/kernel, pinmux, or other config changes, those components should be updated as well.

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ChenJian

@jachen
Thank you for following up
are each of the readme files self redundant? or each of the readme files in the docs folder pressumes that instructions from a number of other readme files from the same doc folder need to be implemented?
In particular the instruction from the docs folder for uart example doesn’t have any reference to the readme file doc/compile-flash.md” with the rrelated step sudo ./flash.sh -k spe-fw mmcblk0p1
that is why I am trying to understand if for uart patch also entire content of other readme files including but not limited to the file doc/compile-flash.md needs to be implemented
so is the compile-flash.md is a pre-requisite for the uart readme? of successor? if they are dependent of one another which of them needs to be processed first? which other doc files or components need to be implemente to get just uart example working?
At which step here goes the spe-fw flashing?

Do you mean that this third flashing is also required?
sudo ./flash.sh -k spe-fw mmcblk0p1

sudo ./flash.sh -k MB1_BCT jetson-xavier mmcblk0p1
sudo ./flash.sh -r -k kernel-dtb jetson-xavier mmcblk0p1

or it will work without flashing the third time?

Hello, Andrey1984:
Let’s clarify the goal for each command:
sudo ./flash.sh -k spe-fw mmcblk0p1
this command is to update the SPE firmware in device. (board name is missed)
sudo ./flash.sh -k MB1_BCT jetson-xavier mmcblk0p1
MB1_BCT update
sudo ./flash.sh -r -k kernel-dtb jetson-xavier mmcblk0p1
kernel-dtb update.

Which command ( or multiple commands) to be used depends on which components to be updated.
For example, if SPE firmware and kernel-DTB are changed, both command 1 and 3 should be used.
The doc for each module, like UART/GPIO/etc., is supposed to focus on that module. Some general instructions may be skipped.

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ChenJian

@jachen so could we use uart gpio example without flashing spe firmware at all, but with flashing MB1_BCT/kernel-dtb? or spe-fw flashing is mandatory for uart gpio example to run?

Hello, Andrey1984:
If anything changed in SPE firmware, sure it should be updated.

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ChenJian

@jachen Thank you for following up!
However, given we got just devkit Xavier with default stock OS; we would like to just test gpio uart [ on nx though].
the gpio uart sample doesn’t mention flashing spe-firmware at all;
what steps are require d to just get uart gpio example working?
could you clarify, please? do these steps require to do spe-flshing ? given gpio uart doesn’t have any mentioning of it in the documentation readme. If the spe-flashing is mandatory for gpio uart example why isn’t it mentioned in the gpio uuart readme? How end user is supposed to extrapolate exact steps to get it working?

Hello, Andrey1984:
As long as any change in SPE firmware, the device should be updated by new SPE firmware. Otherwise, only the old SPE firmware works.
That’s same as kernel, kernel-dtb or any other component changes. For example, if anything changed in kernel, the kernel image should be re-compiled, and updated in device side. So the new kernel can take effect.

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ChenJian