Audio initialization - I2S

[rwang4]

Our setup involves a modem connected to a Jetson device via I2S, with the modem acting as the master clock source. During startup, we initialize the audio hub with the required settings. However, we’ve observed that this initialization is insufficient if the modem is not ready and the master clock is not active. Based on our understanding, if the master clock is absent during initialization, it causes issues—specifically, when the clock becomes available with an audio stream, the audio hub does not bridge the stream to the codec connected to it.

To address this, we implemented a workaround to reinitialize the audio hub when the modem is brough into service(so the clock must present). While this resolves the issue in most cases, we still occasionally encounter a problem where this is insufficient. In such instances, phone calls connect, but audio is completely muted in both directions. Running the initialization script again in these cases restores the audio immediately.

Our questions are as follows:

1. Please confirm if the modem’s master clock need to be active for a successful initialization?
2. If so, why is this the case?
3. Is there a reliable way to detect whether the master clock is active, such as by reading I2S registers?

[kayccc]

Sorry for the late response.
Is this still an issue to support? Any result can be shared?

[spujar]

Hi @rwang4

Apologies for a delayed response. In case you still looking for answers, please check below:

@rwang4

Please confirm if the modem’s master clock need to be active for a successful initialization?

You mean modem provides I2S master clock right?
If yes, then there is no dependency of Tegra AHUB(audio hub) initialization on I2S master clock coming from external source. The AHUB uses an internal clock source for initialization and does not depend on I2S clock.

@rwang4

Is there a reliable way to detect whether the master clock is active, such as by reading I2S registers?

No. There is no HW register which can indicate if master clock is present.

If you can share more info on the schematics and the driver/DT changes you have made, it will be helpful to understand the scenario in which this is happening.